M30622ECTFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30622ECTFP Datasheet - Page 68

• Manufacturer Part Number: M30622ECTFP
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

Precautions for Interrupts
Precautions for Interrupts
(1) Reading address 00000
(2) Setting the stack pointer
(3) The NMI interrupt
(4) External interrupt
• When maskable interrupt is occurred, CPU read the interrupt information (the interrupt number and
• The value of the stack pointer immediately after reset is initialized to 0000
• As for the NMI interrupt pin, an interrupt cannot be disabled. Connect it to the Vcc pin via a resistor
• The NMI pin also serves as P8
• Do not reset the CPU with the input to the NMI pin being in the “L” state.
• Do not attempt to go into stop mode with the input to the NMI pin being in the “L” state. With the input to
• Do not attempt to go into wait mode with the input to the NMI pin being in the “L” state. With the input to
• Signals input to the NMI pin require an "L" level of 1 clock or more, from the operation clock of the CPU.
• Either an “L” level or an “H” level of at least 250 ns width is necessary for the signal input to pins INT
• When the polarity of the INT
Note 1:
interrupt request level) in the interrupt sequence.
The interrupt request bit of the certain interrupt written in address 00000
Reading address 00000
Though the interrupt is generated, the interrupt routine may not be executed.
Do not read address 00000
before setting a value in the stack pointer may become a factor of runaway. Be sure to set a value in
the stack pointer before accepting an interrupt. When using the NMI interrupt, initialize the stack point
at the beginning of a program. Concerning the first instruction immediately after reset, generating any
interrupts including the NMI interrupt is prohibited.
(pull-up) if unused. Be sure to work on it.
allows reading the pin value. Use the reading of this pin only for establishing the pin level at the time
when the NMI interrupt is input.
the NMI being in the “L” state, the CM10 is fixed to “0”, so attempting to go into stop mode is turned
down.
the NMI pin being in the “L” state, the CPU stops but the oscillation does not stop, so no power is saved.
In this instance, the CPU is returned to the normal state by a later interrupt.
through INT
After changing the polarity, set the interrupt request bit to "0". Figure 1.14.13 shows the procedure for
changing the INT interrupt generate factor.
Tentative Specifications REV.A
_______
_______
_______
S
_______
In M30623(80-pin package), can not use INT3 to INT5 as the interrupt factor,because
P1
pecifications in this manual are tentative and subject to change.
________
5
_______
/D
_______
5
13
regardless of the CPU operation clock.
______
/INT
_______
3
_______
to P1
_______
16
________
7
/D
by software sets enabled highest priority interrupt source request bit to “0”.
16
0
15
to INT
by software.
/INT
16
_______
5
________
, which is exclusively input. Reading the contents of the P8 register
5
5
have no corresponding external pin.
pins is changed, the interrupt request bit is sometimes set to "1".
_______
68
_______
_______
_______
_______
_______
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
will then be set to “0”.
16
. Accepting an interrupt
Mitsubishi microcomputers
M16C / 62T Group
________
0