M30622M4 MITSUBISHI [Mitsubishi Electric Semiconductor], M30622M4 Datasheet - Page 145
M30622M4
Manufacturer Part Number
M30622M4
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
1.M30622M4.pdf
(276 pages)
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M30622M4A-462GP D3
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UART2 Special Mode Register 2
Table 1.19.10. Functions changed by I
Table 1.19.11. Timing characteristics of detecting the start condition and the stop condition (Note1)
Note 1 : When the start/stop condition count bit is "1" .
Note 2 : "cycles" is in terms of the input oscillation frequency f(X
1
2
3
4
5
3 to 6 cycles < duration for setting-up (Note2)
3 to 6 cycles < duration for holding (Note2)
Bit 0 of the UART2 special mode register 2 (address 0376
Table 1.19.10 shows the types of control to be changed by I
selection bit is set to “1”. Table 1.19.11 shows the timing characteristics of detecting the start condition
and the stop condition. Set the start/stop condition control bit (bit 7 of UART2 special mode register 2) to
“1” in I
Factor of interrupt number 15
DMA1 factor at the time when 1 1 0 1
is assigned to the DMA request
factor selection bits
Timing for transferring data from the
UART2 reception shift register to the
reception buffer.
Factor of interrupt number 16
Timing for generating a UART2
reception/ACK interrupt request
(Start condition)
(Stop condition)
2
C mode.
SDA
SDA
SCL
Function
Duration for
No acknowledgment detection (NACK) UART2 transmission (the rising edge
Acknowledgment detection (ACK)
Acknowledgment detection (ACK)
The rising edge of the final bit of the
reception clock
The rising edge of the final bit of the
reception clock
setting up
2
C mode selection bit 2
IICM2 = 0
Duration for
holding
16
2
C mode selection bit 2 when the I
) is used as the I
IN
) of the main clock.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
of the final bit of the clock)
UART2 reception (the falling edge
of the final bit of the clock)
UART2 reception (the falling edge of
the final bit of the clock)
The falling edge of the final bit of the
reception clock
The falling edge of the final bit of the
reception clock
2
C mode selection bit 2.
IICM2 = 1
Mitsubishi microcomputers
M16C / 62 Group
2
C mode
145
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