M30622M4 MITSUBISHI [Mitsubishi Electric Semiconductor], M30622M4 Datasheet - Page 150

• Manufacturer Part Number: M30622M4
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

S I/O3, 4
150
Note 1: n is a value from 00
Note 2: With the external clock selected:
Note 3: If the internal clock is used for the synchronous clock, the transfer clock signal stops at the “H” state.
Table 1.19.12. Specifications of S I/O3, 4
Transfer data format
Transfer clock
Conditions for
transmission/
reception start
Interrupt request
generation timing
Select function
Precaution
• Before data can be written to the SI/Oi transmit/receive register (addresses 0360
• The S I/Oi circuit keeps on with the shift operation as long as the synchronous clock is entered in it,
CLKi pin input must be in the high state. Also, before rewriting the SI/Oi Control Register (addresses
0362
so stop the synchronous clock at the instant when it counts to eight. The internal clock, if selected,
automatically stops.
Item
16
, 0366
16
)’s bit 7 (S
• Transfer data length: 8 bits
• With the internal clock selected (bit 6 of 0362
• With the external clock selected (bit 6 of 0362
• To start transmit/reception, the following requirements must be met:
• To use S I/Oi interrupts, the following requirements must be met:
• Rising edge of the last transfer clock. (Note 3)
• LSB first or MSB first selection
• Function for setting an S
• Unlike UART0–2, SI/Oi (i = 3, 4) is not divided for transfer register and buffer.
- Select the synchronous clock (use bit 6 of 036216, 036616).
f8/2(ni+1), f32/2(ni+1) (Note 1)
- S
- S I/Oi port select bit (bit 3 of 0362
- Select the transfer direction (use bit 5 of 0362
-Write transfer data to SI/Oi transmit/receive register (0360
- Clear the SI/Oi interrupt request bit before writing transfer data to the SI/Oi
Whether transmission/reception begins with bit 0 (LSB) or bit 7 (MSB) can be
selected.
When using an external clock for the transfer clock, the user can choose the
S
Figure 1.19.33.
Therefore, do not write the next transfer data to the SI/Oi transmit/receive register
(addresses 0360
for the transfer clock, S
it finished transferring and then goes to a high-impedance state. However, if the
transfer data is written to the SI/Oi transmit/receive register (addresses 0360
0364
upon writing and the data hold time is thereby reduced.
Select a frequency dividing ratio if the internal clock has been selected (use bits
0 and 1 of 0362
transmit/receive register (bit 3 of 0049
OUTi
16
OUT
through FF
16
pin output level during a non-transfer time. For details on how to set, see
i initial value set bit (use bit 7 of 0362
) during this time, S
OUTi
initial value set bit), make sure the CLKi pin input is held high.
16
16
16
set in the S I/Oi transfer rate register (i = 3, 4).
, 0364
, 0366
OUTi
OUTi
16
16
OUTi
) during a transfer. When the internal clock is selected
).
holds the last data for a 1/2 transfer clock period after
initial value selection
Specifications
is placed in the high-impedance state immediately
16
16
, 0366
, 0366
16
, 0048
16
16
16
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
) = 1.
= 0):Input from the CLKi terminal (Note 2)
, 0366
, 0366
16
16
, 0366
) = 0.
16
16
)= 1.
16
= “1”): f1/2(ni+1),
)
16
, 0364
Mitsubishi microcomputers
M16C / 62 Group
16
, 0364
16
)
16
), the
16
,