SST89V564RD-33-I-PJ SST [Silicon Storage Technology, Inc], SST89V564RD-33-I-PJ Datasheet - Page 26

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SST89V564RD-33-I-PJ

Manufacturer Part Number
SST89V564RD-33-I-PJ
Description
FlashFlex51 MCU
Manufacturer
SST [Silicon Storage Technology, Inc]
Datasheet
Data Sheet
PCA Timer/Counter Mode Register
©2003 Silicon Storage Technology, Inc.
Location
D9H
Symbol
CIDL
WDTE
-
CPS1
CPS0
ECF
1. Not bit addressable
CIDL
7
WDTE
SST89E564RD / SST89V564RD / SST89E554RC / SST89V554RC
6
Function
Counter Idle Control:
0: Programs the PCA Counter to continue functioning during idle mode
1: Programs the PCA Counter to be gated off during idle
Watchdog Timer Enable:
0: Disables Watchdog Timer function on PCA module 4
1: Enables Watchdog Timer function on PCA module 4
Not implemented, reserved for future use.
Note: User should not write ‘1’s to reserved bits. The value read from a reserved bit is indeterminate.
PCA Count Pulse Select bit 1
PCA Count Pulse Select bit 2
PCA Enable Counter Overflow interrupt:
0: Disables the CF bit in CCON
1: Enables CF bit in CCON to generate an interrupt
CPS1 CPS0
0
0
1
1
1. f
OSC
1
= oscillator frequency
0
1
0
1
(CMOD)
5
-
PCA Input
Selected
0
1
2
3
4
-
1
26
Internal clock, f
Internal clock, f
Timer 0 overflow
External clock at ECI/P1.2 pin
(max. rate = f
3
-
OSC
OSC
OSC
/4 in 6 clock mode, f
CPS1
/6 in 6 clock mode (f
/2 in 6 clock mode (f
2
CPS0
1
OSC
OSC
OSC
/8 in 12 clock mode)
FlashFlex51 MCU
/12 in 12 clock mode)
/4 in 12 clock mode)
ECF
0
S71207-04-000
Reset Value
00xxx000b
12/03

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