SST89V564RD-33-I-PJ SST [Silicon Storage Technology, Inc], SST89V564RD-33-I-PJ Datasheet - Page 68

• Manufacturer Part Number: SST89V564RD-33-I-PJ
• Description: FlashFlex51 MCU
• Manufacturer: SST [Silicon Storage Technology, Inc]

Data Sheet
TABLE 13-7: DC E
©2003 Silicon Storage Technology, Inc.
Symbol
V
V
V
V
V
V
V
V
V
I
I
I
R
C
IL
TL
LI
IL
IH
IH1
OL
OL
OL1
OH
OH1
BOD
RST
IO
1. Under steady state (non-transient) conditions, I
2. Capacitive loading on Ports 0 & 2 may cause spurious noise to be superimposed on the V
3. Load capacitance for Port 0, ALE & PSEN#= 100pF, load capacitance for all other outputs = 80pF.
4. Capacitive loading on Ports 0 & 2 may cause the V
5. Pins of Ports 1, 2 & 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
6. Pin capacitance is characterized but not tested. EA# is 25pF (max).
Maximum I
Maximum I
Maximum I
If I
Pins are not guaranteed to sink current greater than the listed test conditions.
to external bus capacitance discharging into the Port 0 & 2 pins when the pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to
qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input.
the address bits are stabilizing.
maximum value when V
OL
exceeds the test condition, V
Parameter
Input Low Voltage
Input High Voltage
Input High Voltage (XTAL1, RST)
Output Low Voltage (Ports 1.5, 1.6, 1.7)
Output Low Voltage (Ports 1, 2, 3)
Output Low Voltage (Port 0, ALE, PSEN#)
Output High Voltage (Ports 1, 2, 3, ALE, PSEN#)
Output High Voltage (Port 0 in External Bus Mode)
Brown-out Detection Voltage
Logical 0 Input Current (Ports 1, 2, 3)
Logical 1-to-0 Transition Current (Ports 1, 2, 3)
Input Leakage Current (Port 0)
RST Pull-down Resistor
Pin Capacitance
OL
OL
OL
T
per port pin:
per 8-bit port:26mA
total for all outputs:71mA
a
= -40°C
LECTRICAL
IN
6
SST89E564RD / SST89V564RD / SST89E554RC / SST89V554RC
is approximately 2V.
TO
+85°C; V
15mA
C
OL
HARACTERISTICS FOR
may exceed the related specification.
DD
1
= 2.7-3.6V; V
OL
must be externally limited as follows:
OH
on ALE and PSEN# to momentarily fall below the V
1,3
5
4
SST89V564RD
68
4
SS
= 0V (1
0.45 < V
Test Conditions
@ 1 MHz, 25°C
2.7 < V
2.7 < V
2.7 < V
I
I
I
I
I
I
I
OL
OL
OL
OL
OL
I
I
I
OH
OH
I
V
V
V
V
V
OH
OH
OH
V
OL
V
DD
DD
DD
DD
DD
IN
OF
= 100µA
= 1.6mA
= 3.5mA
= 200µA
= 3.2mA
= -200µA
= -3.2mA
IN
= 16mA
= -10µA
= -30µA
= -60µA
IN
= 0.4V
= 2.7V
= 2.7V
= 2.7V
= 2.7V
= 2.7V
DD
DD
DD
= 2V
< V
2)
AND
< 3.6
< 3.6
< 3.6
DD
2
2
2
2
2
-0.3
SST89V554RC
OL
s of ALE and Ports 1 & 3. The noise due
0.2V
V
V
V
V
V
0.7V
DD
DD
DD
DD
DD
2.35
Min
-0.5
DD
- 0.3
- 0.7
- 1.5
- 0.3
- 0.7
DD
FlashFlex51 MCU
DD
+ 0.9
- 0.7 specification when
V
V
S71207-04-000
DD
DD
Max
0.45
0.45
2.55
-650
±10
225
-75
0.7
1.0
0.3
1.0
0.3
15
+ 0.5
+ 0.5
Units
KΩ
µA
µA
µA
pF
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
12/03