SST89V564RD-33-I-PJ SST [Silicon Storage Technology, Inc], SST89V564RD-33-I-PJ Datasheet - Page 58

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SST89V564RD-33-I-PJ

Manufacturer Part Number
SST89V564RD-33-I-PJ
Description
FlashFlex51 MCU
Manufacturer
SST [Silicon Storage Technology, Inc]
Datasheet
Data Sheet
TABLE
9.4 Read Operation Under Lock Condition
The status of security bits SB1, SB2, and SB3 can be read
when the read command is disabled by security lock.
There are three ways to read the status.
©2003 Silicon Storage Technology, Inc.
1. External host mode: Read-back = 00H (locked)
2. IAP command: Read-back = previous SFDT data
3. MOVC: Read-back = FFH (blank)
Level
1. P = Programmed (Bit logic state = 0), U = Unprogrammed (Bit logic state = 1).
2. SFST[7:5] = Security Lock Status Bits (SB1_i, SB2_i, SB3_i)
1
2
3
4
9-1: S
SFST[7:5]
000
100
011
101
010
110
001
111
ECURITY
Security Lock Bits
SB1
L
SST89E564RD / SST89V564RD / SST89E554RC / SST89V554RC
U
P
U
P
U
P
U
P
OCK
O
PTIONS
SB2
U
U
U
U
P
P
P
P
1
1,2
SB3
U
U
P
P
U
U
P
P
1
Unlock
SoftLock
Hard Lock
SoftLock
Hard Lock
Hard Lock
Block 1
58
Security Status of:
Unlock
SoftLock
Hard Lock
SoftLock
SoftLock
Hard Lock
Block 0
Security Type
No Security Features are Enabled.
MOVC instructions executed from
external program memory are dis-
abled from fetching code bytes from
internal memory, EA# is sampled and
latched on Reset, and further pro-
gramming of the flash is disabled.
Level 2 plus Verify disabled, both
blocks locked.
Level 2 plus Verify disabled. Code in
Block 1 may program Block 0 and vice
versa.
Level 2 plus Verify disabled. Code in
Block 1 may program Block 0.
Same as Level 3 hard lock/hard lock,
but MCU will start code execution
from the internal memory regardless
of EA#.
FlashFlex51 MCU
S71207-04-000
T9-1.3 1207
12/03

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