SST89V564RD-33-I-PJ SST [Silicon Storage Technology, Inc], SST89V564RD-33-I-PJ Datasheet - Page 32

• Manufacturer Part Number: SST89V564RD-33-I-PJ
• Description: FlashFlex51 MCU
• Manufacturer: SST [Silicon Storage Technology, Inc]

Data Sheet
4.0 FLASH MEMORY PROGRAMMING
The device internal flash memory can be programmed or
erased using the following two methods:
•
•
4.1 External Host Programming Mode
External host programming mode allows the user to pro-
gram the flash memory directly without using the CPU.
External host mode is entered by forcing PSEN# from a
TABLE
Note: V
©2003 Silicon Storage Technology, Inc.
Operation
Read-ID
Chip-Erase
Block-Erase
Sector-Erase
Byte-Program
Byte-Verify (Read)
Select-Block0
Select-Block1
Prog-SC0
Prog-SB1
Prog-SB2
Prog-SB3
Enable-Clock-Double
1. Symbol
External Host Programming mode
In-Application Programming (IAP) mode
AH = Address high order byte; DI = Data Input; DO = Data Output
of the above input pins are invalid and may result in unexpected behaviors.
IL
= Input Low Voltage;
4-1: E
⇓
signifies a negative pulse and the command is asserted during the low state of PROG#/ALE input. All other combinations
XTERNAL
RST
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH1
IH1
IH1
IH1
IH1
IH1
IH1
IH1
IH1
IH1
IH1
IH1
IH1
SST89E564RD / SST89V564RD / SST89E554RC / SST89V554RC
IH
H
OST
= Input High Voltage;
PSEN#
V
V
V
V
V
V
V
V
V
V
V
V
V
M
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
IL
ODE
C
PROG#/
OMMANDS FOR
ALE
V
V
⇓
⇓
⇓
⇓
⇓
⇓
⇓
⇓
⇓
⇓
⇓
IH
IH
1
V
IH1
= Input High Voltage (XTAL, RST); X = Don’t care; AL = Address low order byte;
EA#
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
SST89E/V564RD
32
P3[7]
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IH
IH
IH
IH
IH
IH
IH
IH
IL
IL
IL
IL
logic high to a logic low while RST input is being held con-
tinuously high. The device will stay in external host mode
as long as RST = 1 and PSEN# = 0.
A Read-ID operation is necessary to “arm” the device in
external host mode, and no other external host mode com-
mands can be enabled until a Read-ID is performed. In
external host mode, the internal flash memory blocks are
accessed through the re-assigned I/O port pins (see Figure
4-1 for details) by an external host, such as a MCU program-
mer, a PCB tester or a PC-controlled development board.
P3[6]
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
IL
IL
P2[7]
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
IL
IL
IL
P2[6]
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IH
IH
IH
IH
IH
IH
IH
IH
IL
IL
IL
IL
P0[7:0]
DO
DO
DI
X
X
X
X
X
X
X
X
X
X
FlashFlex51 MCU
P3[5:4]
P2[5:0]
S71207-04-000
A5H
5AH
55H
55H
AH
AH
AH
AH
X
X
X
X
X
P1[7:0]
T4-1.1 1207
AL
AL
AL
AL
X
X
X
X
X
X
X
X
X
12/03