dsPIC33FJ32MC104-I/PT Microchip Technology, dsPIC33FJ32MC104-I/PT Datasheet - Page 108

• Manufacturer Part Number: dsPIC33FJ32MC104-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Mtr Cnt Fam 16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32MC104-I/PT

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
REGISTER 7-10:
DS70652E-page 108
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
T2IE
U-0
—
Unimplemented: Read as ‘0’
AD1IE: ADC1 Conversion Complete Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
U1TXIE: UART1 Transmitter Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
U1RXIE: UART1 Receiver Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
SPI1IE: SPI1 Event Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
SPI1EIE: SPI1 Event Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
T3IE: Timer3 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
T2IE: Timer2 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
OC2IE: Output Compare Channel 2 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
IC2IE: Input Capture Channel 2 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
Unimplemented: Read as ‘0’
T1IE: Timer1 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
OC1IE: Output Compare Channel 1 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
IC1IE: Input Capture Channel 1 Interrupt Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
INT0IE: External Interrupt 0 Enable bit
1 = Interrupt request is enabled
0 = Interrupt request is not enabled
OC2IE
R/W-0
U-0
—
IEC0: INTERRUPT ENABLE CONTROL REGISTER 0
W = Writable bit
‘1’ = Bit is set
AD1IE
R/W-0
R/W-0
IC2IE
U1TXIE
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U1RXIE
R/W-0
R/W-0
T1IE
SPI1IE
OC1IE
R/W-0
R/W-0
 2011-2012 Microchip Technology Inc.
x = Bit is unknown
SPI1EIE
R/W-0
R/W-0
IC1IE
INT0IE
R/W-0
R/W-0
T3IE
bit 8
bit 0