dsPIC33FJ32MC104-I/PT Microchip Technology, dsPIC33FJ32MC104-I/PT Datasheet - Page 185

• Manufacturer Part Number: dsPIC33FJ32MC104-I/PT
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Mtr Cnt Fam 16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32MC104-I/PT

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 35
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

REGISTER 15-4:
 2011-2012 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-0
Note 1:
SEVTDIR
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
R/W-0
R/W-0
2:
(1)
SEVTDIR is compared with PTDIR (PxTMR<15>) to generate the Special Event Trigger.
PxSECMP<14:0> is compared with PxTMR<14:0> to generate the Special Event Trigger.
SEVTDIR: Special Event Trigger Time Base Direction bit
1 = A Special Event Trigger will occur when the PWM time base is counting down
0 = A Special Event Trigger will occur when the PWM time base is counting up
SEVTCMP<14:0>: Special Event Compare Value bits
R/W-0
R/W-0
PxSECMP: PWMx SPECIAL EVENT COMPARE REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
SEVTCMP<7:0>
SEVTCMP<14:8>
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
R/W-0
R/W-0
(2)
(2)
(1)
(2)
R/W-0
R/W-0
x = Bit is unknown
R/W-0
R/W-0
DS70652E-page 185
R/W-0
R/W-0
bit 8
bit 0