S9S12G96F0MLF Freescale Semiconductor, S9S12G96F0MLF Datasheet - Page 807

• Manufacturer Part Number: S9S12G96F0MLF
• Description: 16-bit Microcontrollers - MCU 16BIT 96K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G96F0MLF

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 96 KB
• Data Ram Size: 8192 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT

24.4.6
This section provides details of all available Flash commands launched by a command write sequence. The
ACCERR bit in the FSTAT register will be set during the command write sequence if any of the following
illegal steps are performed, causing the command not to be processed by the Memory Controller:
If a Flash block is read during execution of an algorithm (CCIF = 0) on that same block, the read operation
will return invalid data if both flags SFDIF and DFDIF are set. If the SFDIF or DFDIF flags were not
previously set when the invalid read operation occurred, both the SFDIF and DFDIF flags will be set.
If the ACCERR or FPVIOL bits are set in the FSTAT register, the user must clear these bits before starting
any command write sequence (see
24.4.6.1
The Erase Verify All Blocks command will verify that all P-Flash and EEPROM blocks have been erased.
Upon clearing CCIF to launch the Erase Verify All Blocks command, the Memory Controller will verify
that the entire Flash memory space is erased. The CCIF flag will set after the Erase Verify All Blocks
operation has completed. If all blocks are not erased, it means blank check failed, both MGSTAT bits will
be set.
Freescale Semiconductor
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1
As found in the memory map for FTMRG32K1.
Starting any command write sequence that programs or erases Flash memory before initializing the
FCLKDIV register
Writing an invalid command as part of the command write sequence
For additional possible errors, refer to the error handling table provided for each command
Register
FSTAT
Flash Command Description
Erase Verify All Blocks Command
A Flash word or phrase must be in the erased state before being
programmed. Cumulative programming of bits within a Flash word or
phrase is not allowed.
Table 24-29. Erase Verify All Blocks Command FCCOB Requirements
CCOBIX[2:0]
MGSTAT1
MGSTAT0
Table 24-30. Erase Verify All Blocks Command Error Handling
ACCERR
Error Bit
FPVIOL
000
MC9S12G Family Reference Manual, Rev.1.23
Set if CCOBIX[2:0] != 000 at command launch
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read or if
blank check failed.
Section
24.3.2.7).
0x01
CAUTION
FCCOB Parameters
Error Condition
Not required
16 KByte Flash Module (S12FTMRG16K1V1)
1
or if blank check failed .
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