ATAES132-SH-ER Atmel, ATAES132-SH-ER Datasheet - Page 22

• Manufacturer Part Number: ATAES132-SH-ER
• Description: EEPROM AES 32Kbit EE I2C
• Manufacturer: Atmel

Specifications of ATAES132-SH-ER

• Rohs: yes
• Maximum Clock Frequency: 1 MHz
• Operating Supply Voltage: 6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Interface Type: I2C
• Factory Pack Quantity: 2300

5.3.
5.3.1.
5.3.2.
5.3.3.
Write
The ATAES132 supports the standard Serial EEPROM commands to write to unrestricted user memory (AuthWrite and
EncWrite are both 0b). See Appendix J for the I
The ATAES132 is capable of writing 1 to 32 bytes on a single physical page with each write operation.
The write command can only write data to a single user zone; the data can not span multiple user zones. The write command
can only write data to a single EEPROM page; the data can not cross page boundaries. The EERR bit of the STATUS register
is set to 1b to indicate an error if a prohibited write is attempted. See section G.1 for more information.
Write the Command Memory Buffer
The host sends ATAES132 commands to the device by writing the command packet to the command memory buffer using a
standard SPI or I
response memory buffer. The host retrieves the response by reading the response packet using a standard SPI or I
command. See Appendix D for additional information. See Appendix G for examples.
When any error occurs, either the EERR bit or the CRCE bit of the STATUS register is set to 1b to indicate an error.
section G.1 for more information.
The host can reset the pointer in the command memory buffer and the response memory buffer by writing to address 0xFFFE.
See Section D.4 for additional information.
Write the Key Memory or Configuration Memory
The ATAES132 supports standard Serial EEPROM commands to write to the configuration memory or the key memory prior to
locking. The ATAES132 is capable of writing 1 to 32 bytes on a single physical page with each write operation.
Note:
If LockKeys has a value of 0x55 (unlocked) and the address points to key memory, then the starting address must be the first
byte of a key register and 16 bytes of cleartext data must be sent. If these conditions are not satisfied, then an error response
will be generated and the EEPROM will remain unchanged.
If LockConfig has a value of 0x00 (locked) and the address points to the configuration memory, then a write command will
generate an error and the EEPROM will be unchanged.
If LockConfig has a value of 0x55 (unlocked), then the user zone write restrictions imposed by ZoneConfig are enforced, but
can be changed. Atmel does not recommend writing secret data into the user zones prior to locking of the configuration
memory due to the fact that an attacker can change the ZoneConfig bits to allow read of the user zone if the configuration
memory is unlocked.
When any error occurs, either the EERR bit or the CRCE bit of the STATUS register is set to 1b to indicate an error.
section G.1 for more information. See the lock command (Section 7.19) for additional information.
Write the IO Address Reset Register
Partial writes to key registers are prohibited
2
C write command. The ATAES132 processes the command packet and places the response in the
2
C write command and Appendix K for the SPI write command information.
Atmel ATAES132 Preliminary Datasheet
8760A−CRYPTO−5/11
2
C read
See
See
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