ATAES132-SH-ER Atmel, ATAES132-SH-ER Datasheet - Page 98

• Manufacturer Part Number: ATAES132-SH-ER
• Description: EEPROM AES 32Kbit EE I2C
• Manufacturer: Atmel

Specifications of ATAES132-SH-ER

• Rohs: yes
• Maximum Clock Frequency: 1 MHz
• Operating Supply Voltage: 6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Interface Type: I2C
• Factory Pack Quantity: 2300

G.2.2. WakeUp from Sleep
G.2.3. WakeUp from Standby
G.2.4. Read STATUS Register
G.2.5. Read User Memory
If the device is configured to enter the sleep state, then the ATAES132 will NAK any attempt to read the STATUS at the
completion of power up as described in Section G.2.2. If the device is configured to enter the standby state, then the
ATAES132 will NAK any attempt to read the STATUS at the completion of power up as described in Section G.2.3 – ChipState
will remain 0xFFFF in the standby state.
Note:
The ATAES132 will NAK all instructions received during WakeUp from the sleep power state to indicate that it is not ready to
accept a command from the host. When the WakeUp process is complete (after time t
enter the active state. In I
Upon completion of WakeUp from sleep, the command memory buffer is empty, the response memory buffer are all 0xFF's,
and the ChipState = 0x5555. The default EEPROM address is set to 0x0000, and the command and response memory buffer
pointers are set to the base address of the buffers. Upon completion of WakeUp, the STATUS will be 0x00 as shown in Table
G-3.
The ATAES132 will NAK all instructions received during WakeUp from the standby power state to indicate that it is not ready
to accept a command from the host. When the WakeUp process is complete (after time t
the active state. In I
Upon completion of WakeUp from standby the command memory buffer is empty, and the response memory buffer are all
0xFF's. The ChipState will be the value it had prior to entering the standby state. Upon completion of WakeUp the STATUS
will be 0x00 as shown in Table G-3.
To read the STATUS register the host sends a Random Read memory instruction (RREAD) with a starting address of 0xFFF0
when ATAES132 ACKs the I
host can poll the STATUS by reading any number of bytes beginning with address 0xFFF0.
Reading the STATUS register does not change the command memory buffer contents or the response memory buffer
contents. Reading the STATUS register does not change the command memory buffer pointer or the response memory buffer
pointer. Reading the STATUS register does not change the STATUS register.
The ATAES132 instructions for directly reading the user memory are identical to the standard Atmel Serial EEPROM
instructions. The host can send a read memory instruction (READ, RREAD, SREAD) whenever the ATAES132 ACKs the I
device address. If the address being read is valid and access is not prohibited, then the contents of that byte will be returned
to the host. If the address is invalid, or access is prohibited for any reason, then 0xFF will be returned to the host in place of
the prohibited byte.
A read operation begins with an I
during the read operation at an invalid or protected address, then the EERR bit will be set to 1b (see Table G-4). If all bytes
accessed by the read operation are valid and the host satisfied the required access conditions, then the EERR bit will be set to
0b. The contents of the command memory buffer and the response memory buffer will remain unchanged.
Note:
ACK polling or attempting to read the STATUS register after power up is completed will cause the device to
WakeUp.
If an I
1b.
2
C read begins at an authorized address and continues into protected memory, the EERR bit will be set to
2
C Interface mode, it is impossible to read the STATUS register until the completion of WakeUp.
2
C interface mode, it is impossible to read the STATUS register until the completion of WakeUp.
2
C device address. Reading the STATUS register does not increment the read address, so the
2
C start condition and ends with an I
2
C NAK by the host. If one or more bytes are accessed
Atmel ATAES132 Preliminary Datasheet
WupSL.RDY
WupSB.RDY
), then the ATAES132 will
), then ATAES132 will enter
8760A−CRYPTO−5/11
2
C
98