S29GL256S90DHI023 Spansion, S29GL256S90DHI023 Datasheet - Page 78

• Manufacturer Part Number: S29GL256S90DHI023
• Description: Flash 256M, 3V, 90ns Parallel NOR Flash
• Manufacturer: Spansion

Specifications of S29GL256S90DHI023

• Rohs: yes
• Data Bus Width: 16 bit
• Memory Type: NOR Flash
• Memory Size: 256 Mbit
• Architecture: Eclipse
• Timing Type: Asynchronous
• Interface Type: CFI
• Access Time: 90 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 60 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-64
• Organization: 128 KB x 128

10.3
78
10.3.1
Power-On Reset (POR) and Warm Reset
Power-On (Cold) Reset (POR)
Normal precautions must be taken for supply decoupling to stabilize the V
device in a system should have the V
the package connections (this capacitor is generally on the order of 0.1 µF).
Notes:
1. Not 100% tested.
2. Timing measured from V
3. RESET# Low is optional during POR. If RESET is asserted during POR, the later of t
4. V
5. V
6. Sum of t
During the rise of power supplies the V
voltage. V
The Cold Reset Embedded Algorithm requires a relatively long, hundreds of µs, period (t
EAC algorithms and default state from non-volatile memory. During the Cold Reset period all control signals
including CE# and RESET# are ignored. If CE# is Low during t
POR current during t
from High to Low after t
RESET# is Low during t
state. If RESET# is High at the end of t
When power is first applied, with supply voltage below V
internal device configuration and warm reset activities are initiated. CE# is ignored for the duration of the POR
operation (t
POR it must satisfy the Hardware Reset parameters t
completed at the later of t
During Cold Reset the device will draw I
Low. If RESET# remains Low after t
t
RH
CC
CC
Parameter
before CE# goes Low.
≥
and V
t
t
t
t
VIOS
VCS
RPH
t
t
CEH
V
RP
RH
IO
RP
IH
- 200 mV during power-up.
IO
RESET#
VCS
and t
also must remain less than or equal to the V
ramp rate can be non-linear.
VCC
CE#
VIO
RH
or t
must be equal to or greater than t
V
V
RESET# Low to CE# Low
RESET# Pulse Width
Time between RESET# (High) and CE# (low)
CE# Pulse Width High
VIOS
CC
IO
VCS
Setup Time to first access (Notes 1, 2)
Setup Time to first access (Notes 1, 2)
CC
). RESET# Low during this POR period is optional. If RESET# is driven Low during
VCS
VCS
reaching V
but the level of CE# will not affect the Cold Reset EA. CE# or OE# must transition
VCS
for a valid read or write operation. RESET# may be High or Low during t
it may remain Low at the end of t
or t
VIOS
Table 10.2 Power ON and Reset Parameters
CC
VIOS
, or t
GL-S MirrorBit
Description
minimum and V
CC
VCS
or t
Figure 10.3 Power-Up Diagram
IO
VCS
CC7
and V
is satisfied, t
supply voltage must remain less than or equal to the V
RPH
the device will go to the Standby state.
RPH.
current.
D a t a
.
IO
tVCS
IO
®
power supplies decoupled by a suitable capacitor close to
reaching V
tVIOS
Family
RPH
RP
is measured from the end of t
S h e e t
RST
and t
IO
IO
supply.
minimum to V
then rising to reach operating range minimum,
VCS
RPH
VCS
S29GL_128S_01GS_00_07 December 21, 2012
. In which case the Reset operations will be
to hold the device in the Hardware Reset
tCEH
tRH
the device may draw higher than normal
RPH
Limit
Min
Min
Min
Min
Min
Min
IH
, t
on Reset and V
VIOS
CC
, or t
VIOS
and V
VCS
, or t
IO
will determine when CE# may go
VCS
IL
power supplies. Each
Value
on CE#.
300
300
200
. RESET must also be High
35
50
20
VCS
) to load all of the
CC
supply
VCS
Unit
µs
µs
µs
ns
ns
ns
. If