ST72T311J2T6 STMicroelectronics, ST72T311J2T6 Datasheet - Page 64

• Manufacturer Part Number: ST72T311J2T6
• Description: 8-bit Microcontrollers - MCU OTP EPROM 8K SPI/I2C
• Manufacturer: STMicroelectronics

Specifications of ST72T311J2T6

• Core: ST7
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 384 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 5.5 V
• Package / Case: TQFP-44
• Mounting Style: SMD/SMT
• A/d Bit Size: 8 bit
• A/d Channels Available: 6
• Interface Type: SCI, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 44
• Number Of Timers: 2
• On-chip Dac: No
• Program Memory Type: OTP EPROM
• Factory Pack Quantity: 160
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3 V

ST72E311 ST72T311
SERIAL COMMUNICATIONS INTERFACE (Cont’d)
EXTENDED RECEIVE PRESCALER DIVISION
REGISTER (ERPR)
Read/Write
Reset Value: 0000 0000 (00 h)
Allows setting of the Extended Prescaler rate divi-
sion factor for the receive circuit.
Bit 7:1 = ERPR[7:0] 8-bit Extended Receive Pres-
caler Register.
The extended Baud Rate Generator is activated
when a value different from 00h is stored in this
register. Therefore the clock frequency issued
from the 16 divider (see Figure 3.) is divided by the
binary factor set in the ERPR register (in the range
1 to 255).
The extended baud rate generator is not used af-
ter a reset.
Table 17. SCI Register Map and Reset Values
64/101
ERPR
Address
7
7
(Hex.)
50
51
52
53
54
55
57
64
ERPR
6
ERPR
SR
Reset Value
DR
Reset Value
BRR
Reset Value
CR1
Reset Value
CR2
Reset Value
ERPR
Reset Value
ETPR
Reset Value
5
Register
Name
ERPR
4
ERPR
3
ERPR7
ETPR7
TDRE
SCP1
DR7
TIE
R8
7
1
0
0
0
0
-
-
ERPR
2
ERPR6
ERPR
ETPR6
SCP0
TCIE
DR6
TC
1
T8
6
1
0
0
0
0
-
-
ERPR
0
0
ERPR5
ETPR5
RDRF
SCT2
DR5
RIE
5
0
x
0
0
0
-
-
EXTENDED TRANSMIT PRESCALER DIVISION
REGISTER (ETPR)
Read/Write
Reset Value:0000 0000 (00h)
Allows setting of the External Prescaler rate divi-
sion factor for the transmit circuit.
Bit 7:1 = ETPR[7:0] 8-bit Extended Transmit Pres-
caler Register.
The extended Baud Rate Generator is activated
when a value different from 00h is stored in this
register. Therefore the clock frequency issued
from the 16 divider (see Figure 3.) is divided by the
binary factor set in the ETPR register (in the range
1 to 255).
The extended baud rate generator is not used af-
ter a reset.
ETPR
7
7
ERPR4
ETPR4
SCT1
IDLE
DR4
ILIE
M
4
0
0
0
0
x
-
-
ETPR
6
ERPR3
ETPR3
WAKE
ETPR
SCT0
DR3
OR
TE
5
3
0
0
0
0
x
-
-
ETPR
4
ERPR2
ETPR2
SCR2
DR2
RE
NF
2
0
x
0
0
0
-
-
ETPR
3
ERPR1
ETPR
ETPR1
SCR1
RWU
DR1
2
FE
1
0
0
0
0
x
-
-
ETPR
1
ERPR0
ETPR0
SCR0
DR0
SBK
ETPR
0
0
x
0
0
0
-
-
-
0
0