ST72T311J2T6 STMicroelectronics, ST72T311J2T6 Datasheet - Page 74

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ST72T311J2T6

Manufacturer Part Number
ST72T311J2T6
Description
8-bit Microcontrollers - MCU OTP EPROM 8K SPI/I2C
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72T311J2T6

Core
ST7
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
8 KB
Data Ram Size
384 B
On-chip Adc
Yes
Operating Supply Voltage
3 V to 5.5 V
Package / Case
TQFP-44
Mounting Style
SMD/SMT
A/d Bit Size
8 bit
A/d Channels Available
6
Interface Type
SCI, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
44
Number Of Timers
2
On-chip Dac
No
Program Memory Type
OTP EPROM
Factory Pack Quantity
160
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3 V

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ST72E311 ST72T311
SERIAL PERIPHERAL INTERFACE (Cont’d)
5.5.5 Low Power Modes
5.5.6 Interrupts
Note: The SPI interrupt events are connected to
the same interrupt vector (see Interrupts chapter).
They generate an interrupt if the corresponding
Enable Control Bit is set and the interrupt mask in
the CC register is reset (RIM instruction).
74/101
WAIT
HALT
SPI End of Transfer Event
Master Mode Fault Event
Mode
74
No effect on SPI.
SPI interrupt events cause the device to exit from WAIT mode.
SPI registers are frozen.
In HALT mode, the SPI is inactive. SPI operation resumes when the MCU is woken up by an interrupt with
“exit from HALT mode” capability.
Interrupt Event
Description
MODF
Event
SPIF
Flag
Control
Enable
SPIE
Bit
from
Wait
Exit
Yes
Yes
from
Exit
Halt
No
No

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