M29W640GT70NA6E NUMONYX, M29W640GT70NA6E Datasheet - Page 25

• Manufacturer Part Number: M29W640GT70NA6E
• Description: IC FLASH 64MBIT 70NS 48TSOP
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of M29W640GT70NA6E

• Format - Memory: FLASH
• Memory Type: FLASH - Nor
• Memory Size: 64M (8Mx8, 4Mx16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 70ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 23/22Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 8M/4M
• Supply Current: 10mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.1.5
4.1.6
Block Erase command
The Block Erase command can be used to erase a list of one or more blocks. Six bus write
operations are required to select the first block in the list. Each additional block in the list can
be selected by repeating the sixth bus write operation using the address of the additional
block. The block erase operation starts the program/erase controller about 50 μs after the
last bus write operation. Once the program/erase controller starts it is not possible to select
any more blocks. Each additional block must therefore be selected within 50 μs of the last
block. The 50 μs timer restarts when an additional block is selected. The status register can
be read after the sixth bus write operation. See the status register section for details on how
to identify if the program/erase controller has started the block erase operation.
If any selected blocks are protected then these are ignored and all the other selected blocks
are erased. If all of the selected blocks are protected the block erase operation appears to
start but will terminate within about 100 μs, leaving the data unchanged. No error condition
is given when protected blocks are ignored.
During the block erase operation the memory will ignore all commands except the Erase
Suspend command. Typical block erase times are given in
and endurance
the status register on the Data Inputs/Outputs. See the
details.
After the block erase operation has completed the memory will return to the read mode,
unless an error has occurred. When an error occurs the memory will continue to output the
status register. A Read/Reset command must be issued to reset the error condition and
return to read mode.
The Block Erase command sets all of the bits in the unprotected selected blocks to ’1’. All
previous data in the selected blocks is lost.
Refer to
AC waveforms.
Erase Suspend command
The Erase Suspend command may be used to temporarily suspend a block erase operation
and return the memory to read mode. The command requires one bus write operation.
The program/erase controller will suspend within the erase suspend latency time of the
Erase Suspend command being issued. Once the program/erase controller has stopped the
memory will be set to read mode and the erase will be suspended. If the Erase Suspend
command is issued during the period when the memory is waiting for an additional block
(before the program/erase controller starts) then the erase is suspended immediately and
will start immediately when the Erase Resume command is issued. It is not possible to
select any further blocks to erase after the Erase Resume.
During Erase Suspend it is possible to read and program cells in blocks that are not being
erased; both read and program operations behave as normal on these blocks. If any attempt
is made to program in a protected block or in the suspended block then the Program
command is ignored and the data remains unchanged. The status register is not read and
no error condition is given. Reading from blocks that are being erased will output the status
register.
It is also possible to issue the Auto Select, Read CFI Query and Unlock Bypass commands
during an Erase Suspend. The Read/Reset command must be issued to return the device to
read array mode before the Resume command will be accepted.
Figure 8: Chip/block erase waveforms (8-bit mode)
cycles. All bus read operations during the block erase operation will output
Section 5: Status register
Table 12: Program, erase times
for a description of Block Erase
for more
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