MT47H64M8CB-3:B Micron Technology Inc, MT47H64M8CB-3:B Datasheet - Page 65

• Manufacturer Part Number: MT47H64M8CB-3:B
• Description: IC DDR2 SDRAM 512MBIT 3NS 60FBGA
• Manufacturer: Micron Technology Inc

Specifications of MT47H64M8CB-3:B

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 512M (64M x 8)
• Speed: 3ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 60-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 45:
PDF: 09005aef8117c18e, Source: 09005aef8211b2e6
512MbDDR2_2.fm - Rev. K 8/06 EN
COMMAND
DQS, DQS#
ADDRESS
CK#
CKE
DM
DQ
CK
Power-Down
VALID 1
VALID
T1
Notes:
t CK
power-down
1. If this command is a PRECHARGE (or if the device is already in the idle state), then the
2. No column accesses are allowed to be in progress at the time power-down is entered. If the
3.
4.
5.
6.
mode 2
Enter
NOP
T2
power-down mode shown is precharge power-down. If this command is an ACTIVE (or if at
least one row is already active), then the power-down mode shown is active power-down.
DLL was not in a locked state when CKE went LOW, the DLL must be reset after exiting
power-down mode for proper READ operation.
t
edges. CKE must remain at the valid input level the entire time it takes to achieve the three
clocks of registration. Thus, after any CKE transition, CKE may not transition from its valid
level during the time period of
t
t
command.
t
via MR (bit 12 = 0).
t
via MR (bit 12 = 1).
CKE (MIN) of three clocks means CKE must be registered on three consecutive positive clock
IH window.
XP timing is used for exit precharge power-down and active power-down to any non-READ
XARD timing is used for exit active power-down to READ command if fast exit is selected
XARDS timing is used for exit active power-down to READ command if slow exit is selected
t CH
t CL
T3
t CKE (MIN) 3
T4
t IH
65
t
IS + 2 x
power-down
t IS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
mode
NOP
CK +
Exit
T5
512Mb: x4, x8, x16 DDR2 SDRAM
t
IH. CKE must not transition during its
t XP 4 , t XARD 5
t XARDS 6
NOP
T6
©2004 Micron Technology, Inc. All rights reserved.
t CKE (MIN) 3
Power-Down Mode
VALID
VALID
T7
t IH
DON’T CARE
VALID
VALID
T8
t
IS and