ISL6597CRZ Intersil, ISL6597CRZ Datasheet - Page 10

IC MOSFET DRVR DUAL SYNC 16-QFN

ISL6597CRZ

Manufacturer Part Number
ISL6597CRZ
Description
IC MOSFET DRVR DUAL SYNC 16-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6597CRZ

Configuration
High and Low Side, Synchronous
Input Type
Non-Inverting
Delay Time
18ns
Number Of Configurations
2
Number Of Outputs
4
High Side Voltage - Max (bootstrap)
36V
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Peak
-
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
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10
ISL6597
L16.4x4
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220-VGGC ISSUE C)
NOTES:
10. Depending on the method of lead termination at the edge of the
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
6. The configuration of the pin #1 identifier is optional, but must be
7. Dimensions D2 and E2 are for the exposed pads which provide
8. Nominal dimensions are provided to assist with PCB Land Pattern
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
SYMBOL
between 0.15mm and 0.30mm from the terminal tip.
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
improved electrical and thermal performance.
Design efforts, see Intersil Technical Brief TB389.
Anvil singulation method is used and not present for saw
singulation.
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
A1
A2
A3
D1
D2
E1
E2
Nd
Ne
L1
A
D
E
N
P
b
e
k
L
θ
0.80
0.23
1.95
1.95
0.25
0.50
MIN
-
-
-
-
-
MILLIMETERS
NOMINAL
4.00 BSC
3.75 BSC
4.00 BSC
3.75 BSC
0.20 REF
0.65 BSC
0.90
0.28
2.10
2.10
0.60
16
4
4
-
-
-
-
-
-
MAX
1.00
0.05
1.00
0.35
2.25
2.25
0.75
0.15
0.60
12
-
Rev. 5 5/04
May 4, 2007
NOTES
FN9165.1
5, 8
7, 8
7, 8
10
9
9
9
9
8
2
3
3
9
9
-
-
-
-
-
-

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