ISL6551IR-T Intersil, ISL6551IR-T Datasheet - Page 15

IC CTRL PWM ZVS FULL BRDG 28-QFN

ISL6551IR-T

Manufacturer Part Number
ISL6551IR-T
Description
IC CTRL PWM ZVS FULL BRDG 28-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6551IR-T

Pwm Type
Current Mode
Number Of Outputs
6
Frequency - Max
1MHz
Duty Cycle
50%
Voltage - Supply
10.8 V ~ 13.2 V
Buck
No
Boost
No
Flyback
Yes
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Frequency-max
1MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
• Power Good (DCOK)
- DCOK pin is an open drain output capable of sinking
- The DCOK comparator might not be triggered even
FIGURE 11. UNDERVOLTAGE-OVERVOLTAGE WINDOW
DCOK
5mA. It is low when the output voltage is within the
UVOV window. The static regulation limit is
the
power good when the EAI is within -3% to +5% on the
rising edge and within +3% to -5% on the falling edge, as
shown in Figure 11.
though the output voltage exceeds
transients. This is because the feedback network of the
error amplifier filters out part of the transients and the EAI
only sees the remaining portion that is still within the limits,
as illustrated in Figure 12. The lower the “zero (1/RC)” of
the error amplifier, the larger the portion of the transient is
filtered out.
±
5% is the dynamic regulation limit. It indicates
FAULT
EAI
15
±
5% limits at load
±
3%, while
+5%
+3%
EANI
-3%
-5%
ISL6551
• Thermal Pad (in QFN only)
0.90V
1.10V
1.05V
1.00V
0.95V
1.00V
- In the QFN package, the pad underneath the center of
- Refer to TB389 for design guidelines.
the IC is a “floating” thermal substrate. The PCB
“thermal land” design for this exposed die pad should
include thermal vias that drop down and connect to
one or more buried copper plane(s). This combination
of vias for vertical heat escape and buried planes for
heat spreading allows the QFN to achieve its full
thermal potential. This pad should be connected to a
low noise copper plane such as Vss.
VOUT
FIGURE 12. OUTPUT TRANSIENT REJECTION
1K
EAI
EANI
18K
R
VOUT
-
+
EAI
15N
C
EAO
January 3, 2006
FN9066.5

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