LT3837EFE#TRPBF Linear Technology, LT3837EFE#TRPBF Datasheet - Page 10

IC CNTRLR SYNC ISO 16TSSOP

LT3837EFE#TRPBF

Manufacturer Part Number
LT3837EFE#TRPBF
Description
IC CNTRLR SYNC ISO 16TSSOP
Manufacturer
Linear Technology
Type
Flybackr
Datasheet

Specifications of LT3837EFE#TRPBF

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Frequency - Switching
50kHz ~ 250kHz
Voltage - Input
4.5 ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Voltage - Output
-
Power - Output
-

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LT3837
OPERATION
The LT3837 is a current mode switcher controller IC
designed specifi cally for use in an isolated fl yback topology
employing synchronous rectifi cation. The LT3837 operation
is similar to traditional current mode switchers. The major
difference is that output voltage feedback is derived via
sensing the output voltage through the transformer. This
precludes the need of an optoisolator in isolated designs
greatly improving dynamic response and reliability. The
LT3837 has a unique feedback amplifi er that samples a
transformer winding voltage during the fl yback period and
uses that voltage to control output voltage.
The internal blocks are similar to many current mode
controllers. The differences lie in the fl yback feedback
amplifi er and load compensation circuitry. The logic block
also contains circuitry to control the special dynamic
requirements of fl yback control.
See Application Note 19 for more information on the
basics of current mode switcher/controllers and isolated
fl yback converters.
Feedback Amplifi er—Pseudo DC Theory
For the following discussion refer to the simplifi ed
Flyback Feedback Amplifi er diagram. When the primary side
MOSFET switch MP turns off, its drain voltage rises above
the V
off and the synchronous secondary MOSFET is on. Dur-
ing fl yback the voltage on nondriven transformer pins is
determined by the secondary voltage. The amplitude of this
fl yback pulse as seen on the third winding is given as:
R
I
ESR = impedance of secondary circuit capacitor, winding
and traces
N
turns ratio (i.e., N
The fl yback voltage is then scaled by an external resistive
divider R1/R2 and presented at the FB pin. The feedback
10
SEC
DS(ON)
SF
V
= transformer effective secondary-to-feedback winding
FLBK
= transformer secondary current
IN
rail. Flyback occurs when the primary MOSFET is
= on resistance of the synchronous MOSFET M
=
V
OUT
+
S
I
/N
SEC
FLBK
N
(
)
ESR R
SF
+
DS ON
(
)
)
S
amplifi er then compares the voltage to the internal bandgap
reference. The feedback amp is actually a transconductance
amplifi er whose output is connected to V
period in the fl yback time. An external capacitor on the V
pin integrates the net feedback amp current to provide the
control voltage to set the current mode trip point.
The regulation voltage at the FB pin is nearly equal to the
bandgap reference V
overall loop. The relationship between V
expressed as:
Combining this with the previous V
an expression for V
programming resistors and secondary resistances:
Rearranging yields the equation for R1.
The effect of nonzero secondary output impedance is dis-
cussed in further detail; see Load Compensation Theory.
The practical aspects of applying this equation for V
are found in the Applications Information section.
Feedback Amplifi er Dynamic Theory
So far, this has been a pseudo-DC treatment of fl yback
feedback amplifi er operation. But the fl yback signal is a
pulse, not a DC level. Provision must be made to enable
the fl yback amplifi er only when the fl yback pulse is present.
This is accomplished by the “Enable” line in the diagram.
Timing signals are then required to enable and disable the
fl yback amplifi er. There are several timing signals which
are required for proper LT3837 operation. Please refer to
the Timing Diagram.
R
V
V
FLBK
OUT
1
=
R
=
2
=
⎝ ⎜
R
R
⎢ ⎢
+ 1 2
1
R
V
R
+
OUT
2
2
R
R
2
OUT
+
V
FB
I
V
SEC
FB
( ) ( )
FB
in terms of the internal reference,
N
because of the high gain in the
SF
N
(
ESR R
SF
V
⎠ ⎟
FB
+
FLBK
I
SEC
DS ON
(
expression yields
( (
FLBK
C
ESR R
)
)
only during a
and V
+
1
DS ON
FB
(
3837fc
OUT
is
C
)
)

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