PCM18XK1 Microchip Technology, PCM18XK1 Datasheet - Page 361

• Manufacturer Part Number: PCM18XK1
• Description: MODULE PROC PIC18F8680,6680,8565
• Manufacturer: Microchip Technology

Specifications of PCM18XK1

• Accessory Type: Processor Module
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: ICE2000
• For Use With: ICE2000 - EMULATOR MPLAB-ICE 2000 POD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

24.4
The overall structure of the code protection on the
PIC18 Flash devices differs significantly from other
PICmicro
The user program memory is divided on binary bound-
aries into four blocks of 16 Kbytes each. The first block
is further divided into a boot block of 2048 bytes and a
second block (Block 0) of 14 Kbytes.
Each of the blocks has three code protection bits
associated with them. They are:
• Code-Protect bit (CPn)
• Write-Protect bit (WRTn)
• External Block Table Read bit (EBTRn)
FIGURE 24-3:
TABLE 24-3:
 2004 Microchip Technology Inc.
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
Legend: Shaded cells are unimplemented.
Note 1:
Unimplemented Read ‘0’
File Name
Program Verification and
Code Protection
®
devices.
(PIC18FX585
Unimplemented in PIC18FX585 devices.
Boot Block
48 Kbytes
Block 0
Block 1
Block 2
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
SUMMARY OF CODE PROTECTION REGISTERS
MEMORY SIZE/DEVICE
CODE-PROTECTED PROGRAM MEMORY FOR PIC18FXX8X DEVICES
WRTD
Bit 7
CPD
—
—
—
—
(PIC18FX680)
64 Kbytes
Boot Block
Block 0
Block 1
Block 2
Block 3
EBTRB
WRTB
Bit 6
CPB
—
—
—
PIC18F6585/8585/6680/8680
WRTC
Bit 5
—
—
—
—
—
000000h
0007FFh
000800h
003FFFh
004000h
007FFFh
008000h
00BFFFh
00C000h
00FFFFh
Address
Range
Figure 24-3 shows the program memory organization
for 48 and 64-Kbyte devices and the specific code
protection bit associated with each block. The actual
locations of the bits are summarized in Table 24-3.
Bit 4
—
—
—
—
—
—
EBTR3
WRT3
CP3
Bit 3
—
—
—
Block Code Protection
(1)
CPB, WRTB, EBTRB
CP0, WRT0, EBTR0
CP1, WRT1, EBTR1
CP2, WRT2, EBTR2
CP3, WRT3, EBTR3
(1)
(1)
Controlled By:
EBTR2
WRT2
Bit 2
CP2
—
—
—
EBTR1
WRT1
Bit 1
CP1
DS30491C-page 359
—
—
—
EBTR0
WRT0
Bit 0
CP0
—
—
—