PCM18XK1 Microchip Technology, PCM18XK1 Datasheet - Page 98

MODULE PROC PIC18F8680,6680,8565

PCM18XK1

Manufacturer Part Number
PCM18XK1
Description
MODULE PROC PIC18F8680,6680,8565
Manufacturer
Microchip Technology
Datasheet

Specifications of PCM18XK1

Accessory Type
Processor Module
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICE2000
For Use With
ICE2000 - EMULATOR MPLAB-ICE 2000 POD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC18F6585/8585/6680/8680
6.2
The external memory interface implemented in
PIC18F8X8X devices operates only in 16-bit mode.
The mode selection is not software configurable but is
programmed via the configuration bits.
The WM<1:0> bits in the MEMCON register determine
three types of connections in 16-bit mode. They are
referred to as:
• 16-bit Byte Write
• 16-bit Word Write
• 16-bit Byte Select
These three different configurations allow the designer
maximum flexibility in using 8-bit and 16-bit memory
devices.
FIGURE 6-1:
DS30491C-page 96
Note 1: This signal only applies to table writes. See Section 5.1 “Table Reads and Table Writes”.
PIC18F8X8X
16-bit Mode
AD<15:8>
A<19:16>
AD<7:0>
WRH
WRL
ALE
OE
CE
16-BIT BYTE WRITE MODE EXAMPLE
373
373
D<7:0>
A<19:0>
D<15:8>
For all 16-bit modes, the Address Latch Enable (ALE)
pin indicates that the Address bits (A<15:0>) are avail-
able on the external memory interface bus. Following
the address latch, the Output Enable signal (OE ) will
enable both bytes of program memory at once to form
a 16-bit instruction word.
In Byte Select mode, JEDEC standard Flash memories
will require BA0 for the byte address line, and one I/O
line to select between Byte and Word mode. The other
16-bit modes do not need BA0. JEDEC standard static
RAM memories will use the UB or LB signals for byte
selection.
6.2.1
Figure 6-1 shows an example of 16-bit Byte Write
mode for PIC18F8X8X devices.
16-BIT BYTE WRITE MODE
A<x:0>
D<7:0>
CE
OE
(MSB)
WR
(1)
 2004 Microchip Technology Inc.
Address Bus
Data Bus
Control Lines
D<7:0>
A<x:0>
D<7:0>
CE
OE
(LSB)
WR
(1)

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