TMP86C993XB Toshiba, TMP86C993XB Datasheet - Page 132

• Manufacturer Part Number: TMP86C993XB
• Description: EMULATION CHIP FOR TMP86F SSOP
• Manufacturer: Toshiba

Specifications of TMP86C993XB

• Accessory Type: Adapter
• For Use With/related Products: TMP86F SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.2
Control
12.2
UART1 Control Register1
UART1CR1
(0025H)
monitored using the UART status register (UART1SR).
UART1 is controlled by the UART1 Control Registers (UART1CR1, UART1CR2). The operating status can be
Note 1: When operations are disabled by setting TXE and RXE bit to “0”, the setting becomes valid when data transmit or receive
Note 2: The transmit clock and the parity are common to transmit and receive.
Note 3: UART1CR1<RXE> and UART1CR1<TXE> should be set to “0” before UART1CR1<BRG> is changed.
Control
TXE
7
complete. When the transmit data is stored in the transmit data buffer, the data are not transmitted. Even if data transmit
is enabled, until new data are written to the transmit data buffer, the current data are not transmitted.
EVEN
STBT
BRG
RXE
TXE
PE
RXE
6
Transfer operation
Receive operation
Transmit stop bit length
Even-numbered parity
Parity addition
Transmit clock select
STBT
5
EVEN
4
PE
3
2
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000:
001:
010:
011:
100:
101:
110:
111:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
BRG
1
Disable
Enable
Disable
Enable
1 bit
2 bits
Odd-numbered parity
Even-numbered parity
No parity
Parity
fc/13 [Hz]
fc/26
fc/52
fc/104
fc/208
fc/416
TC3 (Input INTTC3)
fc/96
0
(Initial value: 0000 0000)
TMP86FH92DMG
Write
only