TMP86C993XB Toshiba, TMP86C993XB Datasheet - Page 151

• Manufacturer Part Number: TMP86C993XB
• Description: EMULATION CHIP FOR TMP86F SSOP
• Manufacturer: Toshiba

Specifications of TMP86C993XB

• Accessory Type: Adapter
• For Use With/related Products: TMP86F SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14. Serial Expansion Interface (SEI)
14.1
via full-duplex synchronous communication protocols. The TMP86FH92DMG contain one channel of SEI.
and SS pins respectively are shared with P02, P03, P04 and P05. When using these ports as SCLK, MOSI, MISO, or
SS pins, set the each Port Output Latch to “1”.
SEI is one of the serial interfaces incorporated in the TMP86FH92DMG. It allows connection to peripheral devices
SEI is connected with an external device through SCLK, MOSI, MISO and the terminal SS. SCLK, MOSI, MISO,
Features
・ The master outputs the shift clock for only a data transfer period.
・ The clock polarity and phase are programmable.
・ The data is 8 bits long.
・ MSB or LSB-first can be selected.
・ The programmable data and clock timing of SEI can be connected to almost all synchronous serial peripheral
・ The transfer rate can be selected from the following four (master only):
・ The error detection circuit supports the following functions:
devices. Refer to “"14.5 SEI Transfer Formats " ”.
1. Write collision detection: When the shift register is accessed for write during transfer
2. Overflow detection: When new data is received while the transfer-finished flag is set (slave only)
3. Mode fault error input: When the SEI device is set as the master, driver output is disabled immediately
4 Mbps, 2 Mbps, 1 Mbps, or 250 kbps (when operating at 16 MHz)
upon input of a low level on the SS pin (in open-drain output mode only). Overflow detection: When
new data is received while the transfer-finished flag is set (slave only)
register
register
control
status
SEI
SEI
Figure 14-1 SEI (Serial Extended Interface)
SEE
MODE
MSTR
CPHA
CPOL
BOS
SER
WCOL
SOVF
MODF
SEF
4, 8, 16, 64 divide
Clock control unit
Internal SEI clock
SEI control unit
Clock selection
Page 137
(INTSEI0/INTSEI1)
SEI interrupt
MISO
Bit order selection
SEI data register
Port control unit
Read buffer
Shift register
MOSI SCLK SS
Data
Address
TMP86FH92DMG