ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 369

• Manufacturer Part Number: ATEVK1105
• Description: KIT EVAL FOR AT32UC3A0
• Manufacturer: Atmel
• Series: AVR®32r
• Type: MCUr

Specifications of ATEVK1105

• Contents: Evaluation Board, Software and Documentation
• Processor To Be Evaluated: AT32UC3A0512
• Processor Series: AVR
• Data Bus Width: 32 bit
• Interface Type: USART, TWI, USB, SPI, Ethernet
• Operating Supply Voltage: 3.3 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Core Sub-architecture: AVR UC3
• Silicon Core Number: AT32UC3A0512
• Silicon Family Name: AVR
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT32UC3A0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 27-3.
27.6.3
27.6.3.1
27.6.3.2
32058J–AVR32–04/11
Connection to External Devices
SMC
Byte Write or Byte Select Access
Data Bus Width
Memory Connections for 6 External Devices
NCS[0] - NCS[5]
D[31:0]
A[25:0]
NWE
NRD
If the physical memory device connected on one chip select is smaller than 64 Mbytes, it wraps
around and appears to be repeated within this space. The SMC correctly handles any valid
access to the memory device within the page (see
A[25:0] is only significant for 8-bit memory, A[25:1] is used for 16-bit memory, A[25:2] is used for
32-bit memory.
A data bus width of 8, 16 or 32 bits can be selected for each chip select. This option is controlled
by the field DBW in MODE (Mode Register) for the corresponding chip select.
Figure 27-4
connect a 512K x 16-bit memory on NCS2.
as a single 32-bit memory.
Each chip select with a 16-bit or 32-bit data bus can operate with one of two different types of
write access: byte write or byte select access. This is controlled by the BAT field of the MODE
register for the corresponding chip select.
shows how to connect a 512K x 8-bit memory on NCS2.
8 or 16 or 32
NCS0
Figure 27-6
NCS1
NCS2
Figure
A[25:0]
Memory Enable
Output Enable
Write Enable
D[31:0] or D[15:0] or
D[7:0]
NCS3
Memory Enable
NCS4
shows two 16-bit memories connected
27-3).
Memory Enable
NCS5
Memory Enable
Memory Enable
Memory Enable
Figure 27-5
AT32UC3A
shows how to
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