ATEVK1105 Atmel, ATEVK1105 Datasheet - Page 380

KIT EVAL FOR AT32UC3A0

ATEVK1105

Manufacturer Part Number
ATEVK1105
Description
KIT EVAL FOR AT32UC3A0
Manufacturer
Atmel
Series
AVR®32r
Type
MCUr
Datasheets

Specifications of ATEVK1105

Contents
Evaluation Board, Software and Documentation
Processor To Be Evaluated
AT32UC3A0512
Processor Series
AVR
Data Bus Width
32 bit
Interface Type
USART, TWI, USB, SPI, Ethernet
Operating Supply Voltage
3.3 V
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
AVR UC3
Silicon Core Number
AT32UC3A0512
Silicon Family Name
AVR
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT32UC3A0
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
27.6.4.5
32058J–AVR32–04/11
– Null Pulse
– Write is Controlled by NWE (WRITE_MODE = 1):
Write Mode
Figure 27-14. Null Setup and Hold Values of NCS and NWE in Write Cycle
Programming null pulse is not permitted. Pulse must be at least set to 1. A null value leads to
unpredictable behavior.
The WRITE_MODE parameter in the MODE register of the corresponding chip select indicates
which signal controls the write operation.
Figure 27-15
put on the bus during the pulse and hold steps of the NWE signal. The internal data buffers are
turned out after the NWE_SETUP time, and until the end of the write cycle, regardless of the
programmed waveform on NCS.
NBS0, NBS1,
NWE0, NWE1
A0, A1
CLK_SMC
NWE,
NCS
D[15:0]
A[25:2]
shows the waveforms of a write operation with WRITE_MODE set to 1. The data is
NCS_WR_SETUP
NWE_SETUP
NWE_CYCLE
NCS_WR_PULSE
NWE_PULSE
NWE_CYCLE
NCS_WR_PULSE
NWE_PULSE
NWE_CYCLE
AT32UC3A
380

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