DSPIC33FJ16GS502-I/SO Microchip Technology, DSPIC33FJ16GS502-I/SO Datasheet - Page 204

• Manufacturer Part Number: DSPIC33FJ16GS502-I/SO
• Description: IC DSPIC MCU/DSP 16K 28-SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS502-I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 16KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 15-4:
REGISTER 15-5:
DS70318D-page 202
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-3
bit 2-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note 1: The smallest pulse width that can be generated on the PWM output corresponds to a value of 0x0008,
R/W-0
R/W-0
R/W-0
R/W-0
2: As the duty cycle gets closer to 0% or 100% of the PWM period (0 ns-40 ns, depending on the mode of
while the maximum pulse width generated corresponds to a value of Period – 0x0008.
operation), the PWM duty cycle resolution will degrade from 1 LSB to 3 LSB.
SEVTCMP<15:3>: Special Event Compare Count Value bits
Unimplemented: Read as ‘0’
MDC<15:0>: Master PWM Duty Cycle Value bits
R/W-0
R/W-0
R/W-0
R/W-0
SEVTCMP: PWM SPECIAL EVENT COMPARE REGISTER
MDC: PWM MASTER DUTY CYCLE REGISTER
SEVTCMP <7:3>
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SEVTCMP <15:8>
Preliminary
MDC<15:8>
MDC<7:0>
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
U-0
—
R/W-0
R/W-0
R/W-0
U-0
—
bit 8
bit 0
bit 8
bit 0