LPC2470FBD208,551 NXP Semiconductors, LPC2470FBD208,551 Datasheet - Page 227
![IC ARM7 MCU LCD 208-LQFP](/photos/12/13/121391/208-lqfp_sot459-1_pkg_sml.jpg)
LPC2470FBD208,551
Manufacturer Part Number
LPC2470FBD208,551
Description
IC ARM7 MCU LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FBD208,551
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4361-5
935284068551
LPC2470FBD208-S
935284068551
LPC2470FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2470FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
UM10237_4
User manual
7.1.15 Station Address 0 Register (SA0 - 0xFFE0 0040)
7.1.16 Station Address 1 Register (SA1 - 0xFFE0 0044)
Table 202. MII Mgmt Indicators register (MIND - address 0xFFE0 0034) bit description
Here are two examples to access PHY via the MII Management Controller.
For PHY Write if scan is not used:
For PHY Read if scan is not used:
The Station Address 0 register (SA0) has an address of 0xFFE0 0040. The bit definition of
this register is shown in
Table 203. Station Address register (SA0 - address 0xFFE0 0040) bit description
The station address is used for perfect address filtering and for sending pause control
frames. For the ordering of the octets in the packet please refer to
The Station Address 1 register (SA1) has an address of 0xFFE0 0044. The bit definition of
this register is shown in
Bit
0
1
2
3
31:4
Bit
7:0
15:8
31:16
1. Write 0 to MCMD
2. Write PHY address and register address to MADR
3. Write data to MWTD
4. Wait for busy bit to be cleared in MIND
1. Write 1 to MCMD
2. Write PHY address and register address to MADR
3. Wait for busy bit to be cleared in MIND
4. Write 0 to MCMD
5. Read data from MRDD
Symbol
BUSY
SCANNING When ’1’ is returned - indicates a scan operation (continuous MII
NOT VALID
MII Link Fail When ’1’ is returned - indicates that an MII Mgmt link fail has
-
Symbol
STATION ADDRESS,
2nd octet
STATION ADDRESS,
1st octet
-
Function
When ’1’ is returned - indicates MII Mgmt is currently performing an
MII Mgmt Read or Write cycle.
Mgmt Read cycles) is in progress.
When ’1’ is returned - indicates MII Mgmt Read cycle has not
completed and the Read Data is not yet valid.
occurred.
Unused
Rev. 04 — 26 August 2009
Table
Table
Function
This field holds the second octet of the station address.
This field holds the first octet of the station address.
Unused
11–203.
11–204.
Chapter 11: LPC24XX Ethernet
Figure
UM10237
© NXP B.V. 2009. All rights reserved.
11–27.
227 of 792
0x0
0x0
Reset
value
0
0
0
0
0x0
Reset
value
0x0
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