LPC2470FBD208,551 NXP Semiconductors, LPC2470FBD208,551 Datasheet - Page 338
![IC ARM7 MCU LCD 208-LQFP](/photos/12/13/121391/208-lqfp_sot459-1_pkg_sml.jpg)
LPC2470FBD208,551
Manufacturer Part Number
LPC2470FBD208,551
Description
IC ARM7 MCU LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FBD208,551
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4361-5
935284068551
LPC2470FBD208-S
935284068551
LPC2470FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2470FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
UM10237_4
User manual
9.2.1 USB Clock Control register (USBClkCtrl - 0xFFE0 CFF4)
9.2.2 USB Clock Status register (USBClkSt - 0xFFE0 CFF8)
9.2 Clock control registers
Table 294. USB Port Select register (USBPortSel - address 0xFFE0 C110) bit description
This register controls the clocking of the USB Device Controller. Whenever software
wants to access the device controller registers, both DEV_CLK_EN and AHB_CLK_EN
must be set. The PORTSEL_CLK_EN bit need only be set when accessing the
USBPortSel register.
The software does not have to repeat this exercise for every register access, provided that
the corresponding USBClkCtrl bits are already set. Note that this register is functional only
when the PCUSB bit of PCONP is set; when PCUSB is cleared, all clocks to the device
controller are disabled irrespective of the contents of this register. USBClkCtrl is a
read/write register.
Table 295. USBClkCtrl register (USBClkCtrl - address 0xFFE0 CFF4) bit description
This register holds the clock availability status. The bits of this register are ORed together
to form the USB_NEED_CLK signal. When enabling a clock via USBClkCtrl, software
should poll the corresponding bit in USBClkSt. If it is set, then software can go ahead with
the register access. Software does not have to repeat this exercise for every access,
provided that the USBClkCtrl bits are not disturbed. USBClkSt is a read only register.
Bit
1:0
31:2
Bit
0
1
2
3
4
31:5
Symbol
PORTSEL
-
Symbol
-
DEV_CLK_EN
-
PORTSEL_CLK_EN
AHB_CLK_EN
-
Value
0x0
0x3
-
Rev. 04 — 26 August 2009
Description
The USB device controller signals are mapped to
the U1 port: USB_CONNECT1, USB_UP_LED1,
USB_D+1, USB_D − 1.
The USB device controller signals are mapped to
the U2 port:USB_CONNECT2, USB_UP_LED2,
USB_D+2, USB_D − 2
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Description
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Device clock enable. Enables the usbclk input to the
device controller
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Port select register clock enable.
AHB clock enable
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Chapter 13: LPC24XX USB device controller
UM10237
© NXP B.V. 2009. All rights reserved.
Reset value
0
NA
338 of 792
Reset
value
NA
0
NA
NA
0
NA
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