ST92F150CV1TB STMicroelectronics, ST92F150CV1TB Datasheet - Page 180

• Manufacturer Part Number: ST92F150CV1TB
• Description: MCU 8BIT 128K FLASH 100TQFP
• Manufacturer: STMicroelectronics
• Series: ST9r

Specifications of ST92F150CV1TB

• Core Processor: ST9
• Core Size: 8/16-Bit
• Speed: 24MHz
• Connectivity: CAN, EBI/EMI, I²C, LIN, SCI, SPI
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 77
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ST92F15x
• Core: ST9
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 6 KB
• Interface Type: CAN, I2C, SCI, SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST92F150-EPB
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit x 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4883

EXTENDED FUNCTION TIMER (EFT)
EXTENDED FUNCTION TIMER (Cont’d)
Note: A single access (read/write) to the SR regis-
ter at the beginning of the interrupt routine is the
first step needed to clear all the EFT interrupt
flags. In a second step, the lower bytes of the data
; INTERRUPT ROUTINE EXAMPLE
L6:
L2:
L3:
L4:
L5:
L7:
iret
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9
push R234
spp #28
cp R254,#0
jxz L7
tm R254,#128
jxz L2
ld r1,R241
; Insert your code here
tm R254,#16
jxz L3
ld r1,R243
; Insert your code here
tm R254,#64
jxz L4
ld r1,R249
; Insert your code here
tm R254,#8
jxz L5
ld r1,R251
; Insert your code here
tm R254,#32
jxz L6
ld r1,R245
; Insert your code here
jx L6
pop R234
; Check Input Capture 2 flag
; Check Input Compare 1 flag
; Check Input Compare 2 flag
; Save current page
; Set EFT page
; while E0_SR is not cleared
; Check Input Capture 1 flag
; else go to next test
; Dummy read to clear IC1LR
; else go to next test
; Dummy read to clear IC2LR
; else go to next test
; Dummy read to clear OC1LR
; else go to next test
; Dummy read to clear OC1LR
; Check Input Overflow flag
; else go to next test
; Dummy read to clear Overflow flag
; Restore current page
registers must be accessed if the corresponding
flag is set. It is not necessary to access the SR
register between these instructions, but it can
done.