ST92F150CV1TB STMicroelectronics, ST92F150CV1TB Datasheet - Page 214

MCU 8BIT 128K FLASH 100TQFP

ST92F150CV1TB

Manufacturer Part Number
ST92F150CV1TB
Description
MCU 8BIT 128K FLASH 100TQFP
Manufacturer
STMicroelectronics
Series
ST9r
Datasheet

Specifications of ST92F150CV1TB

Core Processor
ST9
Core Size
8/16-Bit
Speed
24MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SCI, SPI
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
77
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
ST92F15x
Core
ST9
Data Bus Width
8 bit, 16 bit
Data Ram Size
6 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
80
Number Of Timers
5 x 16 bit
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST92F150-EPB
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-4883

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST92F150CV1TB
Manufacturer:
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Quantity:
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Part Number:
ST92F150CV1TB
Manufacturer:
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0
MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (SCI-M)
MULTIPROTOCOL SERIAL COMMUNICATIONS INTERFACE (Cont’d)
10.5.4 SCI-M Operating Modes
10.5.4.1 Asynchronous Mode
In this mode, data and clock can be asynchronous
(the transmitter and receiver can use their own
clocks to sample received data), each data bit is
sampled 16 times per clock period.
The baud rate clock should be set to the ÷16 Mode
and the frequency of the input clock (from an ex-
ternal source or from the internal baud-rate gener-
ator output) is set to suit.
Figure 108. Sampling Times in Asynchronous Format
214/429
9
SDIN
rcvck
rxclk
LEGEND:
SIN:
rcvck:
rxd:
rxclk:
rxd
Serial Data Input line
Internal X16 Receiver Clock
Internal Serial Data Input Line
Internal Receiver Shift Register Sampling Clock
0
1
2
3
4
5
10.5.4.2
Synchronous Clock
In this mode, data and clock are synchronous,
each data bit is sampled once per clock period.
For transmit operation, a general purpose I/O port
pin can be programmed to output the CLKOUT
signal from the baud rate generator. If the SCI is
provided with an external transmission clock
source, there will be a skew equivalent to two
INTCLK periods between clock and data.
Data will be transmitted on the falling edge of the
transmit clock. Received data will be latched into
the SCI on the rising edge of the receive clock.
7
8
9
Asynchronous
10
11
12
13
14
Mode
15
VR001409
with

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