MCHC912B32CFUE8 Freescale Semiconductor, MCHC912B32CFUE8 Datasheet - Page 257

• Manufacturer Part Number: MCHC912B32CFUE8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MCHC912B32CFUE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Package: 80PQFP
• Family Name: HC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 63
• Processor Series: HC912B
• Core: HC12
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912B32E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.10 Memory Map
The msCAN12 occupies 128 bytes in the CPU12 memory space. The background receive buffer can be
read only in test mode.
16.11 Programmer’s Model of Message Storage
This subsection details the organization of the receive and transmit message buffers and the associated
control registers.
16.11.1 Message Buffer Organization
Figure 16-10
simplification, the receive and transmit message buffers have the same register organization. Each
message buffer allocates 16 bytes in the memory map containing:
All bits of the 13-byte data structure are undefined out of reset.
Freescale Semiconductor
•
•
•
13-byte data structure which includes an identifier section (IDRn), a data section (DSRn), and the
data length register (DLR)
Transmit buffer priority register (TBPR) which is only applicable for transmit buffers. See
Transmit Buffer Priority Register
Two unused bytes
shows the organization of a single message buffer. For reasons of programmer interface
The receive buffer can be read anytime but cannot be written. The transmit
buffers can be read or written anytime.
Figure 16-9. msCAN12 Memory Map
$010D
$013C
$013D
$010E
M68HC12B Family Data Sheet, Rev. 9.1
$010F
$011F
$013F
$014F
$015F
$016F
$017F
$0100
$0108
$0109
$0110
$0120
$0140
$0150
$0160
$0170
TRANSMIT BUFFER 0 (Tx0)
TRANSMIT BUFFER 1 (Tx1)
TRANSMIT BUFFER 2 (Tx2)
RECEIVE BUFFER (RxFG)
PORT CAN REGISTERS
CONTROL REGISTERS
NOTE
ERROR COUNTERS
IDENTIFIER FILTER
RESERVED
RESERVED
16 BYTES
29 BYTES
9 BYTES
5 BYTES
2 BYTES
3 BYTES
Memory Map
16.11.5
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