MCHC912B32CFUE8 Freescale Semiconductor, MCHC912B32CFUE8 Datasheet - Page 97

• Manufacturer Part Number: MCHC912B32CFUE8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MCHC912B32CFUE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Package: 80PQFP
• Family Name: HC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 63
• Processor Series: HC912B
• Core: HC12
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912B32E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

If BYTE = 1 and test mode is not enabled, only the location specified by the address written to the
programming latches will be erased. The operation will be a byte or an aligned word erase depending on
the size of written data.
ERASE — Erase Control Bit
EELAT — EEPROM Latch Control Bit
EEPGM — Program and Erase Enable Bit
The BULKP, BYTE, ROW, ERASE, and EELAT bits cannot be changed when EEPGM is set. To complete
a program or erase, a write to clear EEPGM and EELAT bits is required before reading the programmed
data. A write to an EEPROM location has no effect when EEPGM is set. Latched address and data cannot
be modified during program or erase.
A program or erase operation should follow this sequence:
To program/erase more bytes or words without intermediate EEPROM reads, only write EEPGM = 0 in
step 5, leaving EELAT = 1, and jump to step 2.
Freescale Semiconductor
1. Write BYTE, ROW, and ERASE to the desired value;
2. Write a byte or an aligned word to an EEPROM address.
3. Write EEPGM = 1.
4. Wait for programming (
5. Write EEPGM = 0 and EELAT = 0.
Read anytime. Write anytime if EEPGM = 0.
Configures the EEPROM for erasure or programming.
When test mode is not enabled and unless BULKP is set, erasure is by byte, aligned word, row, or bulk.
Read anytime. Write anytime if EEPGM = 0.
BYTE, ROW, ERASE, and EELAT bits can be written simultaneously or in any sequence.
The EEPGM bit can be set only after EELAT has been set. When an attempt is made to set EELAT
and EEPGM simultaneously, EEPGM remains clear but EELAT is set.
0 = EEPROM configuration for programming or reading
1 = EEPROM configuration for erasure
0 = EEPROM set up for normal reads
1 = EEPROM address and data bus latches set up for programming or erasing
0 = Disables program/erase voltage to EEPROM
1 = Applies program/erase voltage to EEPROM
write EELAT = 1.
When EELAT is set, the entire EEPROM is unavailable for reads.
Therefore, no program residing in the EEPROM can be executed while
attempting to program unused EEPROM space. Care should be taken that
no references to the EEPROM are used while programming. Interrupts
should be turned off if the vectors are in the EEPROM. Timing and any
serial communications must be done with polling during the programming
process.
t
PROG
) or erase (
M68HC12B Family Data Sheet, Rev. 9.1
t
Erase
NOTE
) delay time.
EEPROM Control Registers
97