AT90PWM1-16SU Atmel, AT90PWM1-16SU Datasheet - Page 28

• Manufacturer Part Number: AT90PWM1-16SU
• Description: MCU AVR 8K FLASH 16MHZ 24-SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM1-16SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 24-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.1.3
7.1.4
7.1.5
7.2
28
Clock Sources
AT90PWM1
Flash Clock – clk
PLL Clock – clk
ADC Clock – clk
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simul-
taneously with the CPU clock.
The PLL clock allows the PSC modules to be clocked directly from a 64/32 MHz clock. A 16 MHz
clock is also derived for the CPU.
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O clocks
in order to reduce noise generated by digital circuitry. This gives more accurate ADC conversion
results.
The device has the following clock source options, selectable by Flash Fuse bits as illustrated
Table 7-1. The clock from the selected source is input to the AVR clock generator, and routed to
the appropriate modules.
Table 7-1.
The various choices for each clocking option is given in the following sections. When the CPU
wakes up from Power-down or Power-save, the selected clock source is used to time the start-
up, ensuring stable Oscillator operation before instruction execution starts. When the CPU starts
from reset, there is an additional delay allowing the power to reach a stable level before starting
normal operation. The Watchdog Oscillator is used for timing this real-time part of the start-up
time. The number of WDT Oscillator cycles used for each time-out is shown in
PLL
Device Clocking Option
External Crystal/Ceramic Resonator
PLL output divided by 4 : 16 MHz / PLL driven by External
Crystal/Ceramic Resonator
PLL output divided by 4 : 16 MHz / PLL driven by External
Crystal/Ceramic Resonator
Reserved
PLL output divided by 4 : 16 MHz
Calibrated Internal RC Oscillator
PLL output divided by 4 : 16 MHz / PLL driven by External
clock
External Clock
ADC
FLASH
1.For all fuses “1” means unprogrammed while “0” means programmed
2.Ext Osc : External Osc
3.RC Osc : Internal RC Oscillator
4.Ext Clk : External Clock Input
Device Clocking Options Select AT90PWM1
System
Clock
Ext Osc
Ext Osc
PLL / 4
N/A
PLL / 4
RC Osc
PLL / 4
Ext Clk
(2)
PLL Input
RC Osc
Ext Osc
Ext Osc
N/A
RC Osc
RC Osc
Ext Clk
RC Osc
(4)
(3)
Table
4378C–AVR–09/08
1111 - 1000
CKSEL3..0
0111- 0110
0100
0101
0010
0001
0000
0011
7-2. The
(1)