S9S08DZ96F2MLF Freescale Semiconductor, S9S08DZ96F2MLF Datasheet - Page 201

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S9S08DZ96F2MLF

Manufacturer Part Number
S9S08DZ96F2MLF
Description
MCU 96K FLASH MASK AUTO 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of S9S08DZ96F2MLF

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08D
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
6 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
87
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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9.1.2
The ACMP has the following features:
9.1.3
This section defines the ACMP operation in wait, stop and background debug modes.
9.1.3.1
The ACMP continues to run in wait mode if enabled before executing the WAIT instruction. Therefore,
the ACMP can be used to bring the MCU out of wait mode if the ACMP interrupt, ACIE is enabled. For
lowest possible current consumption, the ACMP should be disabled by software if not required as an
interrupt source during wait mode.
9.1.3.2
9.1.3.2.1
The ACMP continues to operate in Stop3 mode if enabled and compare operation remains active. If
ACOPE is enabled, comparator output operates as in the normal operating mode and comparator output is
placed onto the external pin. The MCU is brought out of stop when a compare event occurs and ACIE is
enabled; ACF flag sets accordingly.
If stop is exited with a reset, the ACMP will be put into its reset state.
9.1.3.2.2
During either Stop2 and Stop1 mode, the ACMP module will be fully powered down. Upon wake-up from
Stop2 or Stop1 mode, the ACMP module will be in the reset state.
9.1.3.3
When the microcontroller is in active background mode, the ACMP will continue to operate normally.
9.1.4
The block diagram for the Analog Comparator module is shown
Freescale Semiconductor
Full rail to rail supply operation.
Selectable interrupt on rising edge, falling edge, or either rising or falling edges of comparator
output.
Option to compare to fixed internal bandgap reference voltage.
Option to allow comparator output to be visible on a pin, ACMPxO.
Can operate in stop3 mode
Features
Modes of Operation
Block Diagram
ACMP in Wait Mode
ACMP in Stop Modes
ACMP in Active Background Mode
Stop3 Mode Operation
Stop2 and Stop1 Mode Operation
MC9S08DZ128 Series Data Sheet, Rev. 1
Figure
Chapter 9 Analog Comparator (S08ACMPV3)
9-2.
201

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