S9S08DZ96F2MLF Freescale Semiconductor, S9S08DZ96F2MLF Datasheet - Page 398

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S9S08DZ96F2MLF

Manufacturer Part Number
S9S08DZ96F2MLF
Description
MCU 96K FLASH MASK AUTO 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of S9S08DZ96F2MLF

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08D
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
6 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
87
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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S9S08DZ96F2MLF
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Chapter 18 Debug Module (S08DBGV3) (128K)
18.3.3.3
1
18.3.3.4
398
end-run
end-run
Module Base + 0x0002
Module Base + 0x0003
end-run
end-run
or non-
In the case of an end-trace to reset where DBGEN=1 and BEGIN=0, the bits in this register do not change after reset.
Bits 15–8
or non-
Bits 7–0
Reset
Reset
Field
Field
POR
POR
W
W
R
R
1
1
Bit 15
Comparator A Low Compare Bits — The Comparator A Low compare bits control whether Comparator A will
compare the address bus bits [7:0] to a logic 1 or logic 0.
0 Compare corresponding address bit to a logic 0
1 Compare corresponding address bit to a logic 1
Comparator B High Compare Bits — The Comparator B High compare bits control whether Comparator B will
compare the address bus bits [15:8] to a logic 1 or logic 0. Not used in Full mode.
0 Compare corresponding address bit to a logic 0
1 Compare corresponding address bit to a logic 1
Bit 7
Debug Comparator B High Register (DBGCBH)
Debug Comparator B Low Register (DBGCBL)
U
U
0
0
7
7
Figure 18-4. Debug Comparator B High Register (DBGCBH)
Figure 18-5. Debug Comparator B Low Register (DBGCBL)
Bit 14
Bit 6
U
U
0
0
6
6
Table 18-5. DBGCBH Field Descriptions
Table 18-4. DBGCAL Field Descriptions
MC9S08DZ128 Series Data Sheet, Rev. 1
Bit 13
Bit 5
U
U
0
0
5
5
Bit 12
Bit 4
U
U
0
0
4
4
Description
Description
Bit 11
Bit 3
U
U
0
0
3
3
Bit 10
Bit 2
U
U
0
0
2
2
Freescale Semiconductor
Bit 9
Bit 1
U
U
0
0
1
1
Bit 8
Bit 0
U
U
0
0
0
0

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