S9S08DZ96F2MLF Freescale Semiconductor, S9S08DZ96F2MLF Datasheet - Page 395

• Manufacturer Part Number: S9S08DZ96F2MLF
• Description: MCU 96K FLASH MASK AUTO 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08DZ96F2MLF

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Processor Series: S08D
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 6 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 87
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08DZ60
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.3
This section provides a detailed description of all DBG registers accessible to the end user.
18.3.1
Table 18-1
Freescale Semiconductor
Memory Map and Registers
shows the registers contained in the DBG module.
Module Memory Map
Base + $000A
Base + $000B
Base + $000C
Base + $000D
Base + $000E
Base + $0000
Base + $0001
Base + $0002
Base + $0003
Base + $0004
Base + $0005
Base + $0006
Base + $0007
Base + $0008
Base + $0009
Base + $000F
Address
Debug FIFO Extended Information Register (DBGFX)
Debug Comparator C Extension Register (DBGCCX)
Debug Comparator A Extension Register (DBGCAX)
Debug Comparator B Extension Register (DBGCBX)
Debug Comparator C High Register (DBGCCH)
Debug Comparator A High Register (DBGCAH)
Debug Comparator B High Register (DBGCBH)
Debug Comparator C Low Register (DBGCCL)
Debug Comparator A Low Register (DBGCAL)
Debug Comparator B Low Register (DBGCBL)
MC9S08DZ128 Series Data Sheet, Rev. 1
Table 18-1. Module Memory Map
Debug FIFO Count Register (DBGCNT)
Debug FIFO High Register (DBGFH)
Debug FIFO Low Register (DBGFL)
Debug Control Register (DBGC)
Debug Trigger Register (DBGT)
Debug Status Register (DBGS)
Use
Chapter 18 Debug Module (S08DBGV3) (128K)
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read only
Read only
Read only
Read only
Read only
Access
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