DF3026X25V Renesas Electronics America, DF3026X25V Datasheet - Page 198
DF3026X25V
Manufacturer Part Number
DF3026X25V
Description
MCU 3V 256K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3026X25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3026X25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 198 of 843
- Download datasheet (5Mb)
Section 7 I/O Ports
7.3
7.3.1
Port 2 is an 8-bit input/output port which also has an address output function. It’s pin
configuration is shown in figure 7.2. The pin functions differ according to the operating mode.
In modes 1 to 4 (expanded modes with on-chip ROM disabled), port 2 consists of address bus
output pins (A
port 2 data direction register (P2DDR) can designate pins for address bus output (A
generic input. In modes 6 and 7 (single-chip mode), port 2 is a generic input/output port.
Port 2 has software-programmable built-in pull-up transistors.
Pins in port 2 can drive one TTL load and a 90-pF capacitive load. They can also drive an LED or
a darlington transistor pair.
Rev. 2.00 Sep 20, 2005 page 158 of 800
REJ09B0260-0200
Port 2
Port 2
Overview
15
to A
Port 2 pins
8
). In mode 5 (expanded modes with on-chip ROM enabled), settings in the
P2 /A
P2 /A
P2 /A
P2 /A
P2 /A
P2 /A
P2 /A
P2 /A
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
Figure 7.2 Port 2 Pin Configuration
Modes 1 to 4
A
A
A
A
A
A
A (output)
A (output)
15
14
13
12
11
10
9
8
(output)
(output)
(output)
(output)
(output)
(output)
Mode 5
P2 (input)/A
P2 (input)/A
P2 (input)/A
P2 (input)/A
P2 (input)/A
P2 (input)/A
P2 (input)/A
P2 (input)/A
7
6
5
4
3
2
1
0
15
14
13
12
11
10
9
8
(output)
(output)
(output)
(output)
(output)
(output)
(output)
(output)
Modes 6 and 7
P2 (input/output)
P2 (input/output)
P2 (input/output)
P2 (input/output)
P2 (input/output)
P2 (input/output)
P2 (input/output)
P2 (input/output)
7
6
5
4
3
2
1
0
15
to A
8
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