DF2378RVFQ34WV Renesas Electronics America, DF2378RVFQ34WV Datasheet - Page 388
![MCU 3V 512K I-TEMP PB-FREE 144-L](/photos/28/61/286116/144-lqfp__plqp0144kc-a_sml.jpg)
DF2378RVFQ34WV
Manufacturer Part Number
DF2378RVFQ34WV
Description
MCU 3V 512K I-TEMP PB-FREE 144-L
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2378RVFQ34WV
Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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- Download datasheet (8Mb)
Section 7 DMA Controller (DMAC)
7.5.5
Single address mode can only be specified for channel B. This mode can be specified by setting
the SAE bit in DMABCRH to 1 in short address mode.
One address is specified by MAR, and the other is set automatically to the data transfer
acknowledge pin (DACK). The transfer direction can be specified by the DTDIR bit in DMACR.
Table 7.8 summarizes register functions in single address mode.
Table 7.8
Register
MAR specifies the start address of the transfer source or transfer destination as 24 bits. IOAR is
invalid; in its place the strobe for external devices (DACK) is output.
Figure 7.9 illustrates operation in single address mode (when sequential mode is specified).
Rev.7.00 Mar. 18, 2009 page 320 of 1136
REJ09B0109-0700
23
15
Single Address Mode
DACK pin
Register Functions in Single Address Mode
ETCR
MAR
0
0
DTDIR = 0 DTDIR = 1 Initial Setting
Source
address
register
Write
strobe
Transfer counter
Function
Destination
address
register
Read
strobe
Start address of
transfer destination
or transfer source
(Set automatically
by SAE bit; IOAR is
invalid)
Number of transfers See sections 7.5.2,
Operation
See sections 7.5.2,
Sequential Mode,
7.5.3, Idle Mode, and
7.5.4, Repeat Mode.
Strobe for external
device
Sequential Mode,
7.5.3, Idle Mode, and
7.5.4, Repeat Mode.
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