DF2378RVFQ34WV Renesas Electronics America, DF2378RVFQ34WV Datasheet - Page 660

• Manufacturer Part Number: DF2378RVFQ34WV
• Description: MCU 3V 512K I-TEMP PB-FREE 144-L
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2378RVFQ34WV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 34MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 11 16-Bit Timer Pulse Unit (TPU)
Table 11.28 Register Combinations in Buffer Operation
Channel
0
3
• When TGR is an output compare register
• When TGR is an input capture register
Rev.7.00 Mar. 18, 2009 page 592 of 1136
REJ09B0109-0700
Buffer register
Input capture
signal
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 11.12.
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in the timer general register is transferred to the buffer register.
This operation is illustrated in figure 11.13.
Buffer register
Figure 11.12 Compare Match Buffer Operation
Timer General Register
TGRA_0
TGRB_0
TGRA_3
TGRB_3
Figure 11.13 Input Capture Buffer Operation
Compare match signal
Timer general
register
Timer general
register
Comparator
Buffer Register
TGRC_0
TGRD_0
TGRC_3
TGRD_3
TCNT
TCNT