UPD70F3736GK-GAK-AX Renesas Electronics America, UPD70F3736GK-GAK-AX Datasheet - Page 689

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UPD70F3736GK-GAK-AX

Manufacturer Part Number
UPD70F3736GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3736GK-GAK-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
66
Core Processor
RISC
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Peripherals
DMA, LVD, PWM, WDT
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3736GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
21.6.4 Securing oscillation stabilization time when releasing STOP mode
operation of the main clock oscillator stops after STOP mode is set.
Oscillated waveform
Secure the oscillation stabilization time for the main clock oscillator after releasing the STOP mode because the
(1) Releasing STOP mode by non-maskable interrupt request signal or unmasked maskable interrupt
(2) Release by reset
Interrupt request
request signal
Secure the oscillation stabilization time by setting the OSTS register.
When the releasing source is generated, the dedicated internal timer starts counting according to the OSTS
register setting. When it overflows, the normal operation mode is restored.
This operation is the same as that of a normal reset.
The oscillation stabilization time differs depending on the option byte setting. For details, see CHAPTER 27
OPTION BYTE.
STOP status
Main clock
ROM circuit stopped
CHAPTER 21 STANDBY FUNCTION
Preliminary User’s Manual U18952EJ1V0UD
Setup time count
689

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