MC68HC908AS60CFN Freescale Semiconductor, MC68HC908AS60CFN Datasheet - Page 335

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MC68HC908AS60CFN

Manufacturer Part Number
MC68HC908AS60CFN
Description
IC MCU 60K FLASH 8MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908AS60CFN

Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
40
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908AS60CFN
Manufacturer:
MOT
Quantity:
5 510
Part Number:
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Manufacturer:
TI
Quantity:
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MC68HC908AS60CFN
Manufacturer:
MOTOROLA/摩托罗拉
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21.5 BDLC MUX Interface
21.5.1 Rx Digital Filter
MC68HC908AS60 — Rev. 1.0
The MUX interface is responsible for bit encoding/decoding and digital
noise filtering between the protocol handler and the physical interface.
The receiver section of the BDLC includes a digital low-pass filter to
remove narrow noise pulses from the incoming message. An outline of
the digital filter is shown in
INTERFACE
INTERFACE
PHYSICAL
Freescale Semiconductor, Inc.
Rx DATA
(BDRxD)
CLOCK
FROM
MUX
For More Information On This Product,
Byte Data Link Controller-Digital (BDLC-D)
Figure 21-5. BDLC Rx Digital Filter Block Diagram
Go to: www.freescale.com
D
INPUT
SYNC
Figure 21-4. BDLC Block Diagram
Q
UP/DOWN
Figure
4-BIT UP/DOWN COUNTER
PHYSICAL INTERFACE
PROTOCOL HANDLER
MUX INTERFACE
CPU INTERFACE
TO J1850 BUS
TO CPU
21-5.
Byte Data Link Controller-Digital (BDLC-D)
OUT
BDLC
D
LATCH
DATA
BDLC MUX Interface
Q
Technical Data
Rx DATA OUT
FILTERED

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