MC68HC908EY16CFA Freescale Semiconductor, MC68HC908EY16CFA Datasheet - Page 100

IC MCU 16K FLASH 8MHZ SPI 32LQFP

MC68HC908EY16CFA

Manufacturer Part Number
MC68HC908EY16CFA
Description
IC MCU 16K FLASH 8MHZ SPI 32LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908EY16CFA

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
POR, PWM
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
HC08EY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE, ZK-HC08EY-A
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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Internal Clock Generator (ICG) Module
8.7.6 ICG DCO Stage Register
DSTG7:DSTG0 — ICG DCO Stage Control Bits
100
These bits indicate the number of stages (above the minimum) in the digitally controlled oscillator. The
total number of stages is approximately equal to $1FF, so changing DSTG from $00 to $FF will
approximately double the period. Incrementing DSTG will increase the period (decrease the
frequency) by 0.202 percent to 0.368 percent (decrementing has the opposite effect). DSTG cannot
be written when ICGON is set to prevent inadvertent frequency shifting. When ICGON is set, DSTG is
controlled by the digital loop filter. Since the DCO is active during reset, reset has no effect on DSTG
and the value may vary.
Address: $003A
Reset:
Read:
Write:
DSTG7
Figure 8-16. ICG DCO Stage Control Register (ICGDSR)
Bit 7
R
R
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
= Reserved
DSTG6
R
6
DSTG5
R
5
DSTG4
Unaffected by reset
R
4
DSTG3
R
3
DSTG2
R
2
DSTG1
R
1
Freescale Semiconductor
DSTG0
Bit 0
R

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