MC68HC908EY16CFA Freescale Semiconductor, MC68HC908EY16CFA Datasheet - Page 138

IC MCU 16K FLASH 8MHZ SPI 32LQFP

MC68HC908EY16CFA

Manufacturer Part Number
MC68HC908EY16CFA
Description
IC MCU 16K FLASH 8MHZ SPI 32LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908EY16CFA

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
POR, PWM
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
HC08EY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE, ZK-HC08EY-A
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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Enhanced Serial Communications Interface (ESCI) Module
13.8.1 ESCI Control Register 1
ESCI control register 1 (SCC1):
LOOPS — Loop Mode Select Bit
ENSCI — Enable ESCI Bit
TXINV — Transmit Inversion Bit
M — Mode (Character Length) Bit
138
This read/write bit enables loop mode operation. In loop mode the RxD pin is disconnected from the
ESCI, and the transmitter output goes into the receiver input. Both the transmitter and the receiver
must be enabled to use loop mode. Reset clears the LOOPS bit.
This read/write bit enables the ESCI and the ESCI baud rate generator. Clearing ENSCI sets the SCTE
and TC bits in ESCI status register 1 and disables transmitter interrupts. Reset clears the ENSCI bit.
This read/write bit reverses the polarity of transmitted data. Reset clears the TXINV bit.
This read/write bit determines whether ESCI characters are eight or nine bits long (See
Table
bit.
1 = Loop mode enabled
0 = Normal operation enabled
1 = ESCI enabled
0 = ESCI disabled
1 = Transmitter output inverted
0 = Transmitter output not inverted
1 = 9-bit ESCI characters
0 = 8-bit ESCI characters
Enables loop mode operation
Enables the ESCI
Controls output polarity
Controls character length
Controls ESCI wakeup method
Controls idle character detection
Enables parity function
Controls parity type
13-5).The ninth bit can serve as a receiver wakeup signal or as a parity bit. Reset clears the M
Address: $0010
Setting the TXINV bit inverts all transmitted values including idle, break,
start, and stop bits.
Reset:
Read:
Write:
LOOPS
Bit 7
0
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Figure 13-9. ESCI Control Register 1 (SCC1)
ENSCI
6
0
TXINV
5
0
NOTE
M
4
0
WAKE
3
0
ILTY
2
0
PEN
1
0
Freescale Semiconductor
Bit 0
PTY
0

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