MC68HC908EY16CFA Freescale Semiconductor, MC68HC908EY16CFA Datasheet - Page 219

• Manufacturer Part Number: MC68HC908EY16CFA
• Description: IC MCU 16K FLASH 8MHZ SPI 32LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908EY16CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: POR, PWM
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: HC08EY
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08EY-A
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

18.8.2 TIMB Counter Registers
The two read-only TIMB counter registers contain the high and low bytes of the value in the TIMB counter.
Reading the high byte (TBCNTH) latches the contents of the low byte (TBCNTL) into a buffer. Subsequent
reads of TBCNTH do not affect the latched TBCNTL value until TBCNTL is read. Reset clears the TIMB
counter registers. Setting the TIMB reset bit (TRST) also clears the TIMB counter registers.
18.8.3 TIMB Counter Modulo Registers
The read/write TIMB modulo registers contain the modulo value for the TIMB counter. When the TIMB
counter reaches the modulo value, the overflow flag (TOF) becomes set, and the TIMB counter resumes
counting from $0000 at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and
overflow interrupts until the low byte (TMODL) is written. Reset sets the TIMB counter modulo registers.
Freescale Semiconductor
Register Name and Address
Register Name and Address
Register Name and Address
Register Name and Address
If TBCNTH is read during a break interrupt, be sure to unlatch TBCNTL by
reading TBCNTL before exiting the break interrupt. Otherwise, TBCNTL
retains the value latched during the break.
Reset the TIMB counter before writing to the TIMB counter modulo registers.
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Figure 18-6. TIMB Counter Modulo Registers (TMODH and TMODL)
Figure 18-5. TIMB Counter Registers (TBCNTH and TBCNTL)
BIT 15
BIT 15
BIT 7
BIT 7
Bit 7
Bit 7
Bit 7
Bit 7
R
R
R
0
0
1
1
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
= Reserved
BIT 14
BIT 14
BIT 6
BIT 6
R
R
6
0
6
0
6
1
6
1
TBCNTH — $002C
TBCNTL — $002D
TBMODH — $002E
TBMODL — $002F
BIT 13
BIT 13
BIT 5
BIT 5
R
R
5
0
5
0
5
1
5
1
NOTE
NOTE
BIT 12
BIT 12
BIT 4
BIT 4
R
R
4
0
4
0
4
1
4
1
BIT 11
BIT 11
BIT 3
BIT 3
R
R
3
0
3
0
3
1
3
1
BIT 10
BIT 10
BIT 2
BIT 2
R
R
2
0
2
0
2
1
2
1
BIT 9
BIT 1
BIT 9
BIT 1
R
R
1
0
1
0
1
1
1
1
BIT 0
BIT 8
BIT 8
BIT 0
Bit 0
Bit 0
Bit 0
Bit 0
R
R
0
0
1
1
I/O Registers
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