HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 16

• Manufacturer Part Number: HD64F7047F50
• Description: IC SUPERH MCU FLASH 256K 100QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

10.7 Usage Notes ...................................................................................................................... 258
10.8 MTU Output Pin Initialization.......................................................................................... 274
10.9 Port Output Enable (POE) ................................................................................................ 306
Section 11 Watchdog Timer.............................................................................. 317
11.1 Features............................................................................................................................. 317
11.2 Input/Output Pin ............................................................................................................... 318
11.3 Register Descriptions........................................................................................................ 319
Rev. 2.00, 09/04, page xiv of xl
10.6.1 Input/Output Timing............................................................................................ 250
10.6.2 Interrupt Signal Timing ....................................................................................... 255
10.7.1 Module Standby Mode Setting ............................................................................ 258
10.7.2 Input Clock Restrictions ...................................................................................... 258
10.7.3 Caution on Period Setting .................................................................................... 259
10.7.4 Contention between TCNT Write and Clear Operations..................................... 259
10.7.5 Contention between TCNT Write and Increment Operations.............................. 260
10.7.6 Contention between TGR Write and Compare Match......................................... 261
10.7.7 Contention between Buffer Register Write and Compare Match ........................ 262
10.7.8 Contention between TGR Read and Input Capture.............................................. 264
10.7.9 Contention between TGR Write and Input Capture............................................. 265
10.7.10 Contention between Buffer Register Write and Input Capture ............................ 266
10.7.11 TCNT2 Write and Overflow/Underflow Contention in Cascade Connection ..... 266
10.7.12 Counter Value during Complementary PWM Mode Stop ................................... 268
10.7.13 Buffer Operation Setting in Complementary PWM Mode .................................. 268
10.7.14 Reset Sync PWM Mode Buffer Operation and Compare Match Flag ................. 269
10.7.15 Overflow Flags in Reset Sync PWM Mode......................................................... 270
10.7.16 Contention between Overflow/Underflow and Counter Clearing........................ 271
10.7.17 Contention between TCNT Write and Overflow/Underflow............................... 272
10.7.18 Cautions on Transition from Normal Operation or PWM Mode 1
10.7.19 Output Level in Complementary PWM Mode and Reset-Synchronous
10.7.20 Interrupts in Module Standby Mode .................................................................... 273
10.7.21 Simultaneous Input Capture of TCNT-1 and TCNT-2 in Cascade Connection... 273
10.8.1 Operating Modes ................................................................................................. 274
10.8.2 Reset Start Operation ........................................................................................... 274
10.8.3 Operation in Case of Re-Setting Due to Error During Operation, etc. ................ 275
10.8.4 Overview of Initialization Procedures and Mode Transitions in Case
10.9.1 Features................................................................................................................ 306
10.9.2 Pin Configuration................................................................................................. 308
10.9.3 Register Configuration......................................................................................... 308
10.9.4 Operation ............................................................................................................. 313
10.9.5 Usage Notes ......................................................................................................... 315
PWM Mode ......................................................................................................... 273
to Reset-Synchronous PWM Mode .................................................................... 273
of Error during Operation, Etc. ........................................................................... 276