HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 393

IC SUPERH MCU FLASH 256K 100QFP

HD64F7047F50

Manufacturer Part Number
HD64F7047F50
Description
IC SUPERH MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047F50

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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12.4
Figure 12.2 shows the general format for asynchronous serial communication. One frame consists
of a start bit (low level), followed by data, a parity bit, and finally stop bits (high level). In
asynchronous serial communication, the transmission line is usually held in the mark state (high
level). The SCI monitors the communication line, and when it goes to the space state (low level),
recognizes a start bit and starts serial communication. Inside the SCI, the transmitter and receiver
are independent units, enabling full-duplex communication. Both the transmitter and the receiver
also have a double-buffered structure, so that data can be read or written during transmission or
reception, enabling continuous data transfer.
12.4.1
Table 12.8 shows the data transfer formats that can be used in asynchronous mode. Any of 12
transfer formats can be selected according to the SMR setting. For details on the multiprocessor
bit, refer to section 12.5, Multiprocessor Communication Function.
Serial
data
Figure 12.2 Data Format in Asynchronous Communication (Example with 8-Bit Data,
Operation in Asynchronous Mode
Data Transfer Format
1
Start
1 bit
bit
0
LSB
D0
One unit of transfer data (character or frame)
D1
D2
Transmit/receive data
Parity, Two Stop Bits)
D3
7 or 8 bits
D4
D5
D6
MSB
D7
Rev. 2.00, 09/04, page 351 of 720
Parity
1 bit
none
0/1
or
bit
1 or 2 bits
1
Stop bit
1
(mark state)
Idle state
1

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