HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 614

IC SUPERH MCU FLASH 256K 100QFP

HD64F7047F50

Manufacturer Part Number
HD64F7047F50
Description
IC SUPERH MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047F50

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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applied or disconnected, fix the FWP pin level at V
protection state in advance.
Conditions for this power-on and power-off timing should also be applied in the event of a power
failure and subsequent recovery.
FWP application/disconnection (see figures 19.11 to 19.13): If V
is applied to FWP pin, a voltage surge from low level on the RESET pin may cause unintentional
programming or erasing of flash memory. Applying voltage to FWP should be carried out while
MCU operation is in a stable condition. If MCU operation is not stable, fix the FWP pin high and
set the protection state. The following points must be observed concerning FWP application and
disconnection to prevent unintentional programming or erasing of flash memory:
• Apply voltage to FWP while the V
• In boot mode, apply voltage to FWP or disconnect it during a reset.
• Prior to applying voltage while FWP pin is in low level in boot mode, ensure that the RESET
• In user program mode, FWP can be switched between high and low level regardless of the
• Disconnect FWP only when the SWE, ESU, PSU, EV, PV, P, and E bits in FLMCR1 are
Do not apply a constant low level to the FWP pin: If a program runs away while low level is
applied to FWP pin, incorrect programming or erasing may occur. Apply a low level to the FWP
pin only when programming or erasing flash memory. Avoid creating a system configuration in
which a low level is constantly applied to the FWP pin. Also, while a low level is applied to the
FWP pin, the watchdog timer should be activated to prevent excess programming or excess
erasing due to program runaway, etc.
Use the recommended algorithm when programming and erasing flash memory: The
recommended algorithm enables programming and erasing to be carried out without subjecting the
device to voltage stress or sacrificing program data reliability. When setting the P or E bit in
FLMCR1, the watchdog timer should be set beforehand as a precaution against program runaway,
etc.
Do not set or clear the SWE bit during execution of a program in flash memory: Wait for at
least 100 µs after clearing the SWE bit before executing a program or reading data in flash
memory. When the SWE bit is set, data in flash memory can be rewritten. Access flash memory
only for verify operations (verification during programming/erasing). Also, do not clear the SWE
Rev. 2.00, 09/04, page 572 of 720
voltage range.
pin level is surely kept low despite the applying voltage is rising to V
where ICs for reset are used, the voltage level of RESET pin can transiently exceed 1/2 V
while V
reset state. FWP input can also be switched during execution of a program in flash memory.
Apply voltage to FWP while programs are not running away.
cleared. Make sure that the SWE, ESU, PSU, EV, PV, P, and E bits are not set by mistake
when applying voltage to FWP pin or disconnecting.
CC
is rising.
CC
voltage is stable enough to satisfy the specification
CC
and place the flash memory in the hardware
CC
is on or off while low level
CC
. Note that in a case
CC

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