ST16C554DIJ68-F Exar Corporation, ST16C554DIJ68-F Datasheet - Page 38

• Manufacturer Part Number: ST16C554DIJ68-F
• Description: IC UART FIFO 16B QUAD 68PLCC
• Manufacturer: Exar Corporation
• Type: Quad UART with 16-byte FIFOsr

Specifications of ST16C554DIJ68-F

• Number Of Channels: 4, QUART
• Package / Case: 68-LCC (J-Lead)
• Features: *
• Fifo's: 16 Byte
• Protocol: RS232
• Voltage - Supply: 2.97 V ~ 5.5 V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 1.5 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.97 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V, 5 V
• No. Of Channels: 4
• Supply Voltage Range: 2.97V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1267-5

ST16C554/554D
2.97V TO 5.5V QUAD UART WITH 16-BYTE FIFO
GENERAL DESCRIPTION ................................................................................................ 1
PIN DESCRIPTIONS ........................................................................................................ 3
1.0 PRODUCT DESCRIPTION....................................................................................................................... 6
2.0 FUNCTIONAL DESCRIPTIONS............................................................................................................... 7
3.0 UART INTERNAL REGISTERS ............................................................................................................. 15
4.0 INTERNAL REGISTER DESCRIPTIONS............................................................................................... 16
F
A
ORDERING INFORMATION
EATURES
PPLICATIONS
2.1 CPU INTERFACE................................................................................................................................................. 7
2.2 DEVICE RESET ................................................................................................................................................... 8
2.3 CHANNEL SELECTION....................................................................................................................................... 8
2.4 CHANNELS A-D INTERNAL REGISTERS ......................................................................................................... 9
2.5 INT OUPUTS FOR CHANNELS A-D ................................................................................................................... 9
2.6 DMA MODE.......................................................................................................................................................... 9
2.7 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT .............................................................................. 10
2.8 PROGRAMMABLE BAUD RATE GENERATOR .............................................................................................. 10
2.9 TRANSMITTER .................................................................................................................................................. 11
2.10 RECEIVER ....................................................................................................................................................... 12
2.11 INTERNAL LOOPBACK ................................................................................................................................. 14
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY .................................................................................. 16
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................... 16
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE................................................................................. 16
4.4 INTERRUPT STATUS REGISTER (ISR) ........................................................................................................... 18
4.5 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY......................................................................................... 19
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE......................................................................................... 20
4.7 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE.. 21
4.8 LINE STATUS REGISTER (LSR) - READ/WRITE ............................................................................................ 22
4.9 MODEM STATUS REGISTER (MSR) - READ/WRITE...................................................................................... 23
F
F
F
T
T
T
T
T
F
F
T
F
F
F
F
F
T
T
T
T
T
T
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
2.9.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY ........................................................................................... 11
2.9.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................... 12
2.9.3 TRANSMITTER OPERATION IN FIFO MODE ............................................................................................................. 12
2.10.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................ 13
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................... 17
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION .................................................................. 17
4.4.1 INTERRUPT GENERATION: ........................................................................................................................................ 18
4.4.2 INTERRUPT CLEARING: ............................................................................................................................................. 18
1: C
2: C
3: INT P
4: INT P
5: TXRDY#
6: T
7: UART CHANNEL A AND B UART INTERNAL REGISTERS ...................................................................................... 15
8: INTERNAL REGISTERS DESCRIPTION. .................................................................................................................. 16
9: I
10: R
11: P
12: INT O
1. ST16C554 B
2. P
3. ST16C554 T
4. T
5. B
6. T
7. T
8. R
9. R
10. I
.................................................................................................................................................... 1
NTERRUPT
YPICAL DATA RATES WITH A
HANNEL
HANNEL
YPICAL
RANSMITTER
RANSMITTER
IN
AUD
ECEIVER
ECEIVER
ECEIVE
ARITY SELECTION
NTERNAL
............................................................................................................................................... 1
O
IN
IN
UT
R
UTPUT
O
O
ATE
AND
C
A-D S
A-D S
A
PERATION FOR
PERATION FOR
FIFO T
S
RYSTAL
O
O
SSIGNMENT
L
OURCE AND
G
PERATION IN NON
PERATION IN
OOP
LOCK
YPICAL
RXRDY# O
M
ENERATOR
O
O
................................................................................................................................ 2
ELECT IN
ELECT IN
ODES
PERATION IN NON
PERATION IN
RIGGER
B
C
ACK IN
D
........................................................................................................................................................ 21
ONNECTIONS
I
IAGRAM
NTEL
..................................................................................................................................................... 22
..................................................................................................................................................... 2
P
T
R
16 M
68 M
............................................................................................................................................... 11
L
FIFO...................................................................................................................................... 13
UTPUTS IN
RANSMITTER FOR
RIORITY
ECEIVER FOR
/M
C
EVEL
14.7456 MH
HANNEL
........................................................................................................................................... 1
OTOROLA
FIFO M
-FIFO M
ODE
ODE
TABLE OF CONTENTS
S
................................................................................................................................... 10
-FIFO M
ELECTION
L
................................................................................................................................... 8
................................................................................................................................... 8
EVEL
FIFO
A
ODE
ODE
AND
D
C
ATA
Z CRYSTAL OR EXTERNAL CLOCK
HANNELS
...................................................................................................................... 12
....................................................................................................................... 18
ODE
AND
.................................................................................................................... 13
C
B ................................................................................................................ 14
................................................................................................................... 19
B
HANNELS
US
.............................................................................................................. 12
DMA M
I
NTERCONNECTIONS
A-D ................................................................................................... 9
I
A-D ............................................................................................. 9
ODE FOR
C
HANNELS
............................................................................. 7
...................................................................... 11
A-D ........................................................... 10
REV. 4.0.1