TDA5250 Infineon Technologies, TDA5250 Datasheet - Page 36

TX/RX ASK/FSK 868-870MHZ 38TSSOP

TDA5250

Manufacturer Part Number
TDA5250
Description
TX/RX ASK/FSK 868-870MHZ 38TSSOP
Manufacturer
Infineon Technologies
Type
Transceiverr
Datasheets

Specifications of TDA5250

Package / Case
38-TSSOP
Frequency
868MHz
Data Rate - Maximum
64kbps
Modulation Or Protocol
ASK, FSK
Applications
RKE, Remote Control Systems
Power - Output
9dBm
Sensitivity
-109dBm
Voltage - Supply
2.1 V ~ 5.5 V
Current - Receiving
9mA
Current - Transmitting
12mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Operating Frequency
870 MHz
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Operating Supply Voltage (min)
2.1V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
SP000012956
TDA5250
TDA5250INTR
TDA5250XT
TDA5250XT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TDA5250
Manufacturer:
Infineon Technologies
Quantity:
135
Part Number:
TDA5250
Quantity:
198
Part Number:
TDA5250D2
Manufacturer:
INFINEON
Quantity:
300
Part Number:
TDA5250D2
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
This means that the device needs t
When activating TX it requires t
For timing information refer to Table 4.3.
For test purposes a TESTMODE is provided by the Sequencer as well. In this mode the BLOCK_PD
register be set to various values. This will override the Sequencer timing. Depending on the settings
in Config Register 00H the corresponding building blocks are enabled, as shown in the subsequent
figure.
Figure 2-17
2.4.19
It supports an external logic with a programmable Clock at pin 26 (CLKDIV).
Figure 2-18
The Output Selection and Divider Ratio can be set in the CLK_DIV register.
Data Sheet
Clock Divider
Sequencer‘s capability
Clock Divider
18 MHz
INTERNAL BUS
4 BIT COUNTER
TXSU
INTERNAL BUS
ASK/FSK
DDSU
WINDOW COUNT COMPLETE
RESET
32 kHz
RX ON
TX ON
setup time to enable the power amplifier.
setup time to start the data detection after RX is activated.
32 kHz
36
16
16
2
16
CLKDiv
26
RC- OSC.
XTAL FREQU.
SELECT
Functional Description
TDA5250 D2
Version 1.7
sequencer_raw.wmf
2007-02-26
clk_div.wmf

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